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* Added an option to disable the LUT mapping cacheMaciej Kurc2021-07-225-8/+16
* Added more code comments, formatted the codeMaciej Kurc2021-07-226-123/+124
* Added computing and reporting LUT mapping cache sizeMaciej Kurc2021-07-162-0/+37
* Fixed assertion typosMaciej Kurc2021-07-161-2/+2
* Migrated C arrays to std::array containers.Maciej Kurc2021-07-162-9/+31
* LUT mapping ceche optimizations 2Maciej Kurc2021-07-163-93/+17
* LUT mapping cache optimizations 1Maciej Kurc2021-07-162-32/+48
* Working site LUT mapping cacheMaciej Kurc2021-07-167-42/+470
* Merge pull request #751 from trabucayre/gw1ns-2gatecat2021-07-063-7/+8
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| * .cirrus/Dockerfile.ubuntu20.04: update apycula to 0.0.1a9Gwenhael Goavec-Merou2021-07-061-1/+1
| * add support for GW1NS-2 familyGwenhael Goavec-Merou2021-07-062-6/+7
* | Merge pull request #754 from YosysHQ/gatecat/ecp5-dcsgatecat2021-07-064-11/+55
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| * | ecp5: Add DCSC supportgatecat2021-07-064-11/+55
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* | Merge pull request #752 from YosysHQ/gatecat/du-mem-errorgatecat2021-07-061-1/+2
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| * | design_utils: Fix memory errorgatecat2021-07-061-1/+2
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* | Merge pull request #750 from YosysHQ/gatecat/io-improvegatecat2021-07-0610-59/+136
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| * interchange: Allow pseudo pip wires to overlap with bound site wires on the s...gatecat2021-07-063-17/+13
| * router2: Dump pre-bound routes when routing fails in debug modegatecat2021-07-061-1/+11
| * interchange: Improve search for PAD-attached belsgatecat2021-07-062-41/+32
| * interchange: tests: add obuftds testAlessandro Comodi2021-07-066-0/+80
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* Merge pull request #748 from acomodi/fix-phys-net-writinggatecat2021-07-021-2/+13
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| * interchange: phys: skip only nets writing on disconnected out portsAlessandro Comodi2021-07-021-2/+13
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* Merge pull request #747 from cr1901/machxo2gatecat2021-07-019-13/+140
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| * machxo2: Fix packing for directly-connected DFFs.William D. Jones2021-07-013-9/+28
| * machxo2: Add VHDL primitives, demo, and script.William D. Jones2021-07-014-0/+81
| * machxo2: Add a special case for pips whose config bits are in multipleWilliam D. Jones2021-07-011-0/+12
| * machxo2: Hardcode a rule for emitting U_/D_ or G_ prefixes in ASCII output.William D. Jones2021-07-011-2/+17
| * machxo2: Set Pip and Wire delays to reasonable fake values mirroringWilliam D. Jones2021-07-011-2/+2
* | Merge pull request #746 from YosysHQ/gatecat/ic-can-invert-constgatecat2021-07-011-5/+9
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| * | interchange: Handle canInvert PIPs when processing preferred constantsgatecat2021-07-011-5/+9
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* | Merge pull request #745 from YosysHQ/gatecat/ic-node-sourcegatecat2021-07-011-0/+5
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| * interchange: Handle case where routing source is a nodegatecat2021-07-011-0/+5
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* clangformatgatecat2021-07-011-1/+5
* Merge pull request #744 from YosysHQ/gatecat/const-in-macrogatecat2021-07-011-1/+1
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| * interchange: Fix handling of constants in macrosgatecat2021-07-011-1/+1
* | Merge pull request #743 from YosysHQ/gatecat/site-rsv-portsgatecat2021-07-015-0/+69
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| * | interchange: Reserve site ports only reachable from dedicated routinggatecat2021-07-015-0/+69
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* | Merge pull request #742 from acomodi/interchange-do-not-output-zero-user-netsgatecat2021-07-011-1/+12
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| * interchange: phys: do not output nets which have no usersAlessandro Comodi2021-07-011-1/+12
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* Merge pull request #741 from acomodi/fix-ded-intercgatecat2021-06-301-8/+14
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| * interchange: fix dedicated interconnect explorationAlessandro Comodi2021-06-301-8/+14
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* Merge pull request #739 from YosysHQ/gatecat/usp-io-macrogatecat2021-06-305-1/+91
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| * interchange: Fix dedicated interconnect check when site is the samegatecat2021-06-301-1/+4
| * interchange: Place IO macro content based on routinggatecat2021-06-301-0/+79
| * interchange: Track the macros that cells have been expanded fromgatecat2021-06-293-0/+8
* | Merge pull request #738 from YosysHQ/json_load_reinitgatecat2021-06-303-11/+11
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| * | Preserve ArchArgs and reinit Context when applicable in GUIMiodrag Milanovic2021-06-303-11/+11
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* / loading json should be disabled in this placeMiodrag Milanovic2021-06-301-1/+1
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* Merge pull request #736 from YosysHQ/gatecat/pp-multi-outputgatecat2021-06-281-13/+2
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| * interchange: Allow site wires driven by more than one belgatecat2021-06-281-13/+2
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