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* | Merge pull request #95 from msgctl/fix/msgctl/gl-performanceMiodrag Milanović2018-10-245-86/+180
|\ \ | | | | | | gui: improved FPGAViewWidget::paintGL() performance
| * | gui: improved FPGAViewWidget::paintGL() performanceMateusz Zalega2018-10-235-86/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | Profiling revealed that memcpy() in QOpenGLBuffer::allocate() had been taking the most time during paintGL() calls. I've been able to take the CPU usage down to about 1/4 of its previous values by caching elements in VBOs and updating them only after subsequent calls to renderGraphicElement(). Signed-off-by: Mateusz Zalega <mateusz@appliedsourcery.com>
* | | Merge pull request #94 from daveshah1/ecp5_dspDavid Shah2018-10-244-15/+939
|\ \ \ | |/ / |/| | Adding basic multiplier support for ECP5
| * | ecp5: DSP fixesDavid Shah2018-10-222-33/+42
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Working on DSPsDavid Shah2018-10-222-83/+200
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Adding DSP supportDavid Shah2018-10-213-1/+799
|/ / | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | ecp5: Implement ECP5 equivalent of c9059fcDavid Shah2018-10-211-0/+9
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Merge pull request #92 from YosysHQ/python-cmdlineDavid Shah2018-10-212-15/+41
|\ \ | | | | | | Allow running Python scripts for all points in flow
| * | common: Allow running Python scripts for all points in flowDavid Shah2018-10-172-15/+41
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | Merge pull request #89 from YosysHQ/ecp5_bramDavid Shah2018-10-1710-10/+619
|\ \ \ | |/ / |/| | ECP5 BRAM support
| * | clangformatDavid Shah2018-10-162-5/+9
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Add support for correct tile naming in all variantsDavid Shah2018-10-164-4/+84
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Add DP16KD timing analysisDavid Shah2018-10-161-2/+29
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Optimise DCC placementDavid Shah2018-10-141-3/+12
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Fix BRAM tile namesDavid Shah2018-10-111-1/+1
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | placer: Fix conflicts during constraint legalisationDavid Shah2018-10-111-0/+6
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Fixing BRAM initialisationDavid Shah2018-10-101-4/+14
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Working on BRAM initialisationDavid Shah2018-10-093-0/+82
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: BRAM improvements with constant/inverted inputsDavid Shah2018-10-062-14/+80
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Fixing EBR constant tie-offsDavid Shah2018-10-052-1/+51
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Bitstream gen for DP16KD BRAMDavid Shah2018-10-051-0/+98
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Infrastructure for BRAM bitstream genDavid Shah2018-10-053-0/+56
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Dummy timing entry for BRAMDavid Shah2018-10-051-0/+3
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | ecp5: Adding constids for blockramDavid Shah2018-10-051-0/+118
| | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | Recalculate max zoom level depending of archMiodrag Milanovic2018-10-142-7/+9
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* | | Merge pull request #88 from YosysHQ/issue72Eddie Hung2018-10-112-23/+19
|\ \ \ | |/ / |/| | Resolve issue #72
| * | [timing] Restore and skip false startpointsEddie Hung2018-09-151-17/+6
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| * | [ice40] TimingPortClass of LC.O ports without any inputs now TMG_IGNOREEddie Hung2018-09-151-6/+13
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* | Merge pull request #83 from YosysHQ/ecp5_dramDavid Shah2018-10-0310-9/+329
|\ \ | | | | | | Adding support for ECP5 distributed RAM
| * | ecp5: Negative clock support, general slice improvementsDavid Shah2018-10-023-4/+41
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Small DRAM routing fixesDavid Shah2018-10-012-7/+25
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | clangformatDavid Shah2018-10-014-9/+5
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Fix packing of FFs into carry/DRAM slicesDavid Shah2018-10-011-4/+12
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Fix DRAM initialisationDavid Shah2018-10-011-2/+2
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Remove broken DRAM timing arcDavid Shah2018-10-011-2/+2
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Debugging DRAM packingDavid Shah2018-10-015-6/+40
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Working on DRAM packingDavid Shah2018-10-012-1/+68
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Handling of DRAM initialisation and wiringDavid Shah2018-10-011-1/+59
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | design_utils: Adding some design helper functionsDavid Shah2018-10-012-0/+36
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Helper functions for distributed RAM supportDavid Shah2018-10-014-0/+66
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | | Merge pull request #86 from YosysHQ/ice40globprom_prClifford Wolf2018-10-031-0/+2
|\ \ \ | | | | | | | | Add info message for promoted global nets
| * | | Add info message for promoted global netsClifford Wolf2018-10-031-0/+2
|/ / / | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Merge pull request #85 from YosysHQ/issue84David Shah2018-10-031-2/+13
|\ \ \ | | | | | | | | ice40: Add error for bad PACKAGE_PIN connections
| * | | ice40: Add error for bad PACKAGE_PIN connectionsDavid Shah2018-10-031-2/+13
|/ / / | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | | Merge pull request #82 from YosysHQ/ecp5_carryDavid Shah2018-10-0110-75/+512
|\| | | | | | | | Adding ECP5 carry support
| * | ecp5: Improve handling of constant CCU2C inputsDavid Shah2018-10-011-9/+65
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Fix carry feed outDavid Shah2018-09-301-1/+1
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Improve mixed no-FF/FF placementDavid Shah2018-09-304-30/+45
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Carry packing fixesDavid Shah2018-09-301-13/+18
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | ecp5: Relative placement and bitstream gen for carriesDavid Shah2018-09-303-2/+37
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-14 13:33:37 +0000