iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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\| *	Add initial logic for handling dedicated interconnect situations.	Keith Rothman	2021-02-23	11	-26/+587
\| *	Move RapidWright git URI back to upstream.	Keith Rothman	2021-02-23	1	-5/+1
\| *	Remove some signedness warnings.	Keith Rothman	2021-02-23	3	-11/+10
\| *	Fix reference copy.	Keith Rothman	2021-02-23	1	-6/+6
\| *	Run "make clangformat".	Keith Rothman	2021-02-23	1	-6/+8
\| *	Initial working constant network support!	Keith Rothman	2021-02-23	4	-14/+145
\| *	Add constant network test case.	Keith Rothman	2021-02-23	5	-0/+42
\| *	Add tests to confirm constant routing import.	Keith Rothman	2021-02-23	3	-9/+78
\| *	Correct some bugs in the create_bba Makefile.	Keith Rothman	2021-02-23	1	-3/+9
\| *	Add initial constant network support to FPGA interchange arch.	Keith Rothman	2021-02-23	2	-7/+47
* \|	Merge pull request #597 from litghost/add_dynamic_bitarray	gatecat	2021-02-24	2	-0/+79
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\| * \|	Bump tests submodule.	Keith Rothman	2021-02-24	1	-0/+0
\| * \|	Fix some bugs found in review.	Keith Rothman	2021-02-24	1	-5/+2
\| * \|	Add dynamic bitarray to common library.	Keith Rothman	2021-02-23	1	-0/+82
* \| \|	docs/archapi: Typo fixes	gatecat	2021-02-24	1	-2/+2
* \| \|	Merge pull request #595 from litghost/const_cell_info	gatecat	2021-02-23	7	-8/+8
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\| * \|	Update archapi.md with latest signature.	Keith Rothman	2021-02-23	1	-1/+1
\| * \|	Change CellInfo in getBelPinsForCellPin to be const.	Keith Rothman	2021-02-23	6	-7/+7
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* \|	Merge pull request #596 from litghost/make_clang_format	gatecat	2021-02-23	2	-11/+16
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\| *	Run "make clangformat" to fix new Bits library.	Keith Rothman	2021-02-23	2	-11/+16
* \|	Merge pull request #594 from YosysHQ/gatecat/heap-tidying	gatecat	2021-02-23	6	-41/+88
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\| *	Refactor some common code to CellInfo methods	gatecat	2021-02-23	6	-38/+43
\| *	HeAP: Document legalise_placement_strict better	gatecat	2021-02-23	1	-3/+45
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*	nexus: Fix getPipDelay returning negative after refactor	gatecat	2021-02-23	1	-1/+1
*	pyconsole: Avoid lockup when reading from stdin	gatecat	2021-02-22	1	-0/+2
*	Demote the 'no clocks' warning to info and make clearer	gatecat	2021-02-20	1	-1/+1
*	Merge pull request #592 from YosysHQ/gatecat/rework-delay	gatecat	2021-02-20	35	-502/+307
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\| *	Update generic.md	gatecat	2021-02-20	1	-4/+4
\| *	python: Bindings for DelayPair and DelayQuad	gatecat	2021-02-19	1	-0/+25
\| *	Replace DelayInfo with DelayPair/DelayQuad	gatecat	2021-02-19	33	-498/+243
\| *	Add DelayPair and DelayQuad structures	gatecat	2021-02-19	1	-0/+35
* \|	clangformat	gatecat	2021-02-19	1	-1/+2
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*	Merge pull request #576 from litghost/add_cell_bel_pin_mapping	gatecat	2021-02-19	28	-86/+2251
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\| *	Fix sign mismatch.	Keith Rothman	2021-02-18	2	-2/+2
\| *	Do some spell checking on site_router.cc	Keith Rothman	2021-02-18	1	-18/+18
\| *	Add some utility methods for site instance access.	Keith Rothman	2021-02-18	3	-13/+42
\| *	Update README's with latest instructions and features.	Keith Rothman	2021-02-18	3	-20/+94
\| *	Update tests library to include Bits unit test.	Keith Rothman	2021-02-17	1	-0/+0
\| *	Add utility targets for getting plain text outputs.	Keith Rothman	2021-02-17	1	-1/+5
\| *	Add IOSTANDARD to ports.	Keith Rothman	2021-02-17	1	-1/+3
\| *	Emit fixed attributes to output physical netlist.	Keith Rothman	2021-02-17	1	-8/+19
\| *	Use Bits library for bit instrisics.	Keith Rothman	2021-02-17	1	-2/+4
\| *	Refactor "get only from iterator" to a utility.	Keith Rothman	2021-02-17	4	-12/+32
\| *	Keep all build artifacts under create_bba/build.	Keith Rothman	2021-02-17	2	-4/+5
\| *	Change how package pin IO sites are selected.	Keith Rothman	2021-02-17	3	-16/+52
\| *	Change makefiles to build a FPGA interchange BBA.	Keith Rothman	2021-02-17	4	-16/+106
\| *	Add examples invoking FPGA interchange nextpnr.	Keith Rothman	2021-02-17	11	-0/+152
\| *	Continue fixes.	Keith Rothman	2021-02-17	6	-23/+97
\| *	Disable traversal limit when reading logical netlist.	Keith Rothman	2021-02-17	1	-1/+3
\| *	Add initial site router.	Keith Rothman	2021-02-17	4	-6/+813