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Age
Files
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*
Update archapi.md with latest signature.
Keith Rothman
2021-02-23
1
-1
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+1
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Change CellInfo in getBelPinsForCellPin to be const.
Keith Rothman
2021-02-23
6
-7
/
+7
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Merge pull request #594 from YosysHQ/gatecat/heap-tidying
gatecat
2021-02-23
6
-41
/
+88
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Refactor some common code to CellInfo methods
gatecat
2021-02-23
6
-38
/
+43
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HeAP: Document legalise_placement_strict better
gatecat
2021-02-23
1
-3
/
+45
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/
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nexus: Fix getPipDelay returning negative after refactor
gatecat
2021-02-23
1
-1
/
+1
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pyconsole: Avoid lockup when reading from stdin
gatecat
2021-02-22
1
-0
/
+2
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Demote the 'no clocks' warning to info and make clearer
gatecat
2021-02-20
1
-1
/
+1
*
Merge pull request #592 from YosysHQ/gatecat/rework-delay
gatecat
2021-02-20
35
-502
/
+307
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Update generic.md
gatecat
2021-02-20
1
-4
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+4
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python: Bindings for DelayPair and DelayQuad
gatecat
2021-02-19
1
-0
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+25
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Replace DelayInfo with DelayPair/DelayQuad
gatecat
2021-02-19
33
-498
/
+243
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Add DelayPair and DelayQuad structures
gatecat
2021-02-19
1
-0
/
+35
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clangformat
gatecat
2021-02-19
1
-1
/
+2
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/
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Merge pull request #576 from litghost/add_cell_bel_pin_mapping
gatecat
2021-02-19
28
-86
/
+2251
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Fix sign mismatch.
Keith Rothman
2021-02-18
2
-2
/
+2
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Do some spell checking on site_router.cc
Keith Rothman
2021-02-18
1
-18
/
+18
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Add some utility methods for site instance access.
Keith Rothman
2021-02-18
3
-13
/
+42
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Update README's with latest instructions and features.
Keith Rothman
2021-02-18
3
-20
/
+94
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Update tests library to include Bits unit test.
Keith Rothman
2021-02-17
1
-0
/
+0
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Add utility targets for getting plain text outputs.
Keith Rothman
2021-02-17
1
-1
/
+5
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Add IOSTANDARD to ports.
Keith Rothman
2021-02-17
1
-1
/
+3
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Emit fixed attributes to output physical netlist.
Keith Rothman
2021-02-17
1
-8
/
+19
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Use Bits library for bit instrisics.
Keith Rothman
2021-02-17
1
-2
/
+4
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Refactor "get only from iterator" to a utility.
Keith Rothman
2021-02-17
4
-12
/
+32
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Keep all build artifacts under create_bba/build.
Keith Rothman
2021-02-17
2
-4
/
+5
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Change how package pin IO sites are selected.
Keith Rothman
2021-02-17
3
-16
/
+52
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Change makefiles to build a FPGA interchange BBA.
Keith Rothman
2021-02-17
4
-16
/
+106
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Add examples invoking FPGA interchange nextpnr.
Keith Rothman
2021-02-17
11
-0
/
+152
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*
Continue fixes.
Keith Rothman
2021-02-17
6
-23
/
+97
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Disable traversal limit when reading logical netlist.
Keith Rothman
2021-02-17
1
-1
/
+3
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Add initial site router.
Keith Rothman
2021-02-17
4
-6
/
+813
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Working on standing up initial constraints system.
Keith Rothman
2021-02-17
8
-25
/
+886
*
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Merge pull request #588 from YosysHQ/gatecat/gowin-fixes
gatecat
2021-02-18
3
-14
/
+21
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gowin: Fix archcheck errors and add to CI
gatecat
2021-02-17
2
-1
/
+12
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*
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gowin: Use base bel bucket/cell type methods
gatecat
2021-02-17
1
-5
/
+1
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*
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gowin: Fix IdStrings being overwritten by wireToGlobal
gatecat
2021-02-17
1
-8
/
+8
*
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Merge pull request #590 from cbalint13/master
gatecat
2021-02-18
2
-4
/
+32
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Expose ice40 arch placer-heap internal parameters.
Balint Cristian
2021-02-18
2
-4
/
+32
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/
*
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Bump tests submodule to include bits tests
gatecat
2021-02-17
1
-0
/
+0
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/
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/
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*
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Merge pull request #589 from litghost/add_bits_library
gatecat
2021-02-17
2
-0
/
+124
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Add a Bits utility library.
Keith Rothman
2021-02-17
2
-0
/
+124
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/
*
Update docs/archapi.md
gatecat
2021-02-17
1
-2
/
+2
*
Merge pull request #587 from YosysHQ/gatecat/generic-vcc
gatecat
2021-02-17
2
-5
/
+7
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generic: Don't generate Vcc if not needed
gatecat
2021-02-17
2
-5
/
+7
*
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clangformat
gatecat
2021-02-17
1
-3
/
+4
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/
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Merge pull request #586 from litghost/add_cell_bel_mapping_only
gatecat
2021-02-17
2
-13
/
+274
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Require `--package` when arch BBA contains multiple packages.
Keith Rothman
2021-02-16
1
-3
/
+11
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[FPGA Interchange] Add Cell -> BEL Pin maps.
Keith Rothman
2021-02-16
2
-13
/
+266
*
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Merge pull request #585 from YosysHQ/gatecat/remove-ivbfc
gatecat
2021-02-17
24
-287
/
+170
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