diff options
Diffstat (limited to 'ice40/main.cc')
| -rw-r--r-- | ice40/main.cc | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/ice40/main.cc b/ice40/main.cc index 4b6a9e42..9b79a08c 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -60,6 +60,7 @@ po::options_description Ice40CommandHandler::getArchOptions() specific.add_options()("hx1k", "set device type to iCE40HX1K"); specific.add_options()("hx8k", "set device type to iCE40HX8K"); specific.add_options()("up5k", "set device type to iCE40UP5K"); + specific.add_options()("u4k", "set device type to iCE5LP4K"); #endif specific.add_options()("package", po::value<std::string>(), "set device package"); specific.add_options()("pcf", po::value<std::string>(), "PCF constraints file to ingest"); @@ -68,14 +69,17 @@ po::options_description Ice40CommandHandler::getArchOptions() specific.add_options()("promote-logic", "enable promotion of 'logic' globals (in addition to clk/ce/sr by default)"); specific.add_options()("no-promote-globals", "disable all global promotion"); + specific.add_options()("opt-timing", "run post-placement timing optimisation pass (experimental)"); specific.add_options()("tmfuzz", "run path delay estimate fuzzer"); + specific.add_options()("pcf-allow-unconstrained", "don't require PCF to constrain all IO"); + return specific; } void Ice40CommandHandler::validate() { conflicting_options(vm, "read", "json"); if ((vm.count("lp384") + vm.count("lp1k") + vm.count("lp8k") + vm.count("hx1k") + vm.count("hx8k") + - vm.count("up5k")) > 1) + vm.count("up5k") + vm.count("u4k")) > 1) log_error("Only one device type can be set\n"); } @@ -86,6 +90,8 @@ void Ice40CommandHandler::customAfterLoad(Context *ctx) std::ifstream pcf(filename); if (!apply_pcf(ctx, filename, pcf)) log_error("Loading PCF failed.\n"); + } else { + log_warning("No PCF file specified; IO pins will be placed automatically\n"); } } void Ice40CommandHandler::customBitstream(Context *ctx) @@ -142,6 +148,11 @@ std::unique_ptr<Context> Ice40CommandHandler::createContext() chipArgs.package = "sg48"; } + if (vm.count("u4k")) { + chipArgs.type = ArchArgs::U4K; + chipArgs.package = "sg48"; + } + if (chipArgs.type == ArchArgs::NONE) { chipArgs.type = ArchArgs::HX1K; chipArgs.package = "tq144"; @@ -161,6 +172,10 @@ std::unique_ptr<Context> Ice40CommandHandler::createContext() ctx->settings[ctx->id("promote_logic")] = "1"; if (vm.count("no-promote-globals")) ctx->settings[ctx->id("no_promote_globals")] = "1"; + if (vm.count("opt-timing")) + ctx->settings[ctx->id("opt_timing")] = "1"; + if (vm.count("pcf-allow-unconstrained")) + ctx->settings[ctx->id("pcf_allow_unconstrained")] = "1"; return ctx; } |