diff options
Diffstat (limited to 'ice40/bitstream.cc')
| -rw-r--r-- | ice40/bitstream.cc | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 0e387c72..609741fe 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -140,8 +140,8 @@ void write_asc(const Context *ctx, std::ostream &out) } } // Set logic cell config - for (auto cell : ctx->cells) { - BelId bel = cell.second->bel; + for (auto& cell : ctx->cells) { + BelId bel = cell.second.get()->bel; if (bel == BelId()) { std::cout << "Found unplaced cell " << cell.first.str(ctx) << " while generating bitstream!" << std::endl; continue; @@ -150,12 +150,12 @@ void write_asc(const Context *ctx, std::ostream &out) int x = beli.x, y = beli.y, z = beli.z; if (cell.second->type == ctx->id("ICESTORM_LC")) { const TileInfoPOD &ti = bi.tiles_nonrouting[TILE_LOGIC]; - unsigned lut_init = get_param_or_def(cell.second, ctx->id("LUT_INIT")); - bool neg_clk = get_param_or_def(cell.second, ctx->id("NEG_CLK")); - bool dff_enable = get_param_or_def(cell.second, ctx->id("DFF_ENABLE")); - bool async_sr = get_param_or_def(cell.second, ctx->id("ASYNC_SR")); - bool set_noreset = get_param_or_def(cell.second, ctx->id("SET_NORESET")); - bool carry_enable = get_param_or_def(cell.second, ctx->id("CARRY_ENABLE")); + unsigned lut_init = get_param_or_def(cell.second.get(), ctx->id("LUT_INIT")); + bool neg_clk = get_param_or_def(cell.second.get(), ctx->id("NEG_CLK")); + bool dff_enable = get_param_or_def(cell.second.get(), ctx->id("DFF_ENABLE")); + bool async_sr = get_param_or_def(cell.second.get(), ctx->id("ASYNC_SR")); + bool set_noreset = get_param_or_def(cell.second.get(), ctx->id("SET_NORESET")); + bool carry_enable = get_param_or_def(cell.second.get(), ctx->id("CARRY_ENABLE")); std::vector<bool> lc(20, false); // From arachne-pnr static std::vector<int> lut_perm = { @@ -176,9 +176,9 @@ void write_asc(const Context *ctx, std::ostream &out) set_config(ti, config.at(y).at(x), "NegClk", neg_clk); } else if (cell.second->type == ctx->id("SB_IO")) { const TileInfoPOD &ti = bi.tiles_nonrouting[TILE_IO]; - unsigned pin_type = get_param_or_def(cell.second, ctx->id("PIN_TYPE")); - bool neg_trigger = get_param_or_def(cell.second, ctx->id("NEG_TRIGGER")); - bool pullup = get_param_or_def(cell.second, ctx->id("PULLUP")); + unsigned pin_type = get_param_or_def(cell.second.get(), ctx->id("PIN_TYPE")); + bool neg_trigger = get_param_or_def(cell.second.get(), ctx->id("NEG_TRIGGER")); + bool pullup = get_param_or_def(cell.second.get(), ctx->id("PULLUP")); for (int i = 0; i < 6; i++) { bool val = (pin_type >> i) & 0x01; set_config(ti, config.at(y).at(x), "IOB_" + std::to_string(z) + ".PINTYPE_" + std::to_string(i), val); @@ -220,10 +220,10 @@ void write_asc(const Context *ctx, std::ostream &out) if (!(ctx->args.type == ArchArgs::LP1K || ctx->args.type == ArchArgs::HX1K)) { set_config(ti_ramb, config.at(y).at(x), "RamConfig.PowerUp", true); } - bool negclk_r = get_param_or_def(cell.second, ctx->id("NEG_CLK_R")); - bool negclk_w = get_param_or_def(cell.second, ctx->id("NEG_CLK_W")); - int write_mode = get_param_or_def(cell.second, ctx->id("WRITE_MODE")); - int read_mode = get_param_or_def(cell.second, ctx->id("READ_MODE")); + bool negclk_r = get_param_or_def(cell.second.get(), ctx->id("NEG_CLK_R")); + bool negclk_w = get_param_or_def(cell.second.get(), ctx->id("NEG_CLK_W")); + int write_mode = get_param_or_def(cell.second.get(), ctx->id("WRITE_MODE")); + int read_mode = get_param_or_def(cell.second.get(), ctx->id("READ_MODE")); set_config(ti_ramb, config.at(y).at(x), "NegClk", negclk_w); set_config(ti_ramt, config.at(y + 1).at(x), "NegClk", negclk_r); @@ -371,7 +371,7 @@ void write_asc(const Context *ctx, std::ostream &out) } // Write RAM init data - for (auto cell : ctx->cells) { + for (auto& cell : ctx->cells) { if (cell.second->bel != BelId()) { if (cell.second->type == ctx->id("ICESTORM_RAM")) { const BelInfoPOD &beli = ci.bel_data[cell.second->bel.index]; @@ -380,7 +380,7 @@ void write_asc(const Context *ctx, std::ostream &out) for (int w = 0; w < 16; w++) { std::vector<bool> bits(256); std::string init = - get_param_str_or_def(cell.second, ctx->id(std::string("INIT_") + get_hexdigit(w))); + get_param_str_or_def(cell.second.get(), ctx->id(std::string("INIT_") + get_hexdigit(w))); assert(init != ""); for (size_t i = 0; i < init.size(); i++) { bool val = (init.at((init.size() - 1) - i) == '1'); |