diff options
Diffstat (limited to 'common')
| -rw-r--r-- | common/command.cc | 5 | ||||
| -rw-r--r-- | common/design_utils.cc | 4 | ||||
| -rw-r--r-- | common/timing.cc | 13 |
3 files changed, 20 insertions, 2 deletions
diff --git a/common/command.cc b/common/command.cc index 8f18f54d..1399efdb 100644 --- a/common/command.cc +++ b/common/command.cc @@ -129,6 +129,7 @@ po::options_description CommandHandler::getGeneralOptions() general.add_options()("version,V", "show version"); general.add_options()("test", "check architecture database integrity"); general.add_options()("freq", po::value<double>(), "set target frequency for design in MHz"); + general.add_options()("timing-allow-fail", "allow timing to fail in design"); general.add_options()("no-tmdriv", "disable timing-driven placement"); general.add_options()("save", po::value<std::string>(), "project file to write"); general.add_options()("load", po::value<std::string>(), "project file to read"); @@ -178,6 +179,10 @@ void CommandHandler::setupContext(Context *ctx) settings->set("timing/ignoreLoops", true); } + if (vm.count("timing-allow-fail")) { + settings->set("timing/allowFail", true); + } + if (vm.count("cstrweight")) { settings->set("placer1/constraintWeight", vm["cstrweight"].as<float>()); } diff --git a/common/design_utils.cc b/common/design_utils.cc index a0b87764..da170030 100644 --- a/common/design_utils.cc +++ b/common/design_utils.cc @@ -27,6 +27,8 @@ NEXTPNR_NAMESPACE_BEGIN void replace_port(CellInfo *old_cell, IdString old_name, CellInfo *rep_cell, IdString rep_name) { + if (!old_cell->ports.count(old_name)) + return; PortInfo &old = old_cell->ports.at(old_name); PortInfo &rep = rep_cell->ports.at(rep_name); NPNR_ASSERT(old.type == rep.type); @@ -107,6 +109,8 @@ void disconnect_port(const Context *ctx, CellInfo *cell, IdString port_name) return user.cell == cell && user.port == port_name; }), port.net->users.end()); + if (port.net->driver.cell == cell && port.net->driver.port == port_name) + port.net->driver.cell = nullptr; } } diff --git a/common/timing.cc b/common/timing.cc index 64dcdf71..2a0af874 100644 --- a/common/timing.cc +++ b/common/timing.cc @@ -611,8 +611,9 @@ struct Timing continue; delay_t dmax = crit_path->at(ClockPair{startdomain.first, startdomain.first}).path_delay; for (size_t i = 0; i < net->users.size(); i++) { - float criticality = 1.0f - (float(nc.slack.at(i) - worst_slack.at(startdomain.first)) / dmax); - nc.criticality.at(i) = criticality; + float criticality = + 1.0f - ((float(nc.slack.at(i)) - float(worst_slack.at(startdomain.first))) / dmax); + nc.criticality.at(i) = std::min<double>(1.0, std::max<double>(0.0, criticality)); } nc.max_path_length = nd.max_path_length; nc.cd_worst_slack = worst_slack.at(startdomain.first); @@ -837,6 +838,10 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p auto cursor = sink_wire; delay_t delay; while (driver_wire != cursor) { +#ifdef ARCH_ECP5 + if (net->is_global) + break; +#endif auto it = net->wires.find(cursor); assert(it != net->wires.end()); auto pip = it->second.pip; @@ -900,6 +905,10 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p log_info("Max frequency for clock %*s'%s': %.02f MHz (%s at %.02f MHz)\n", width, "", clock_name.c_str(), clock_fmax[clock.first], passed ? "PASS" : "FAIL", target); else + if (bool_or_default(ctx->settings, ctx->id("timing/allowFail"), false)) + log_warning("Max frequency for clock %*s'%s': %.02f MHz (%s at %.02f MHz)\n", width, "", + clock_name.c_str(), clock_fmax[clock.first], passed ? "PASS" : "FAIL", target); + else log_nonfatal_error("Max frequency for clock %*s'%s': %.02f MHz (%s at %.02f MHz)\n", width, "", clock_name.c_str(), clock_fmax[clock.first], passed ? "PASS" : "FAIL", target); } |