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-rw-r--r--CMakeLists.txt4
-rw-r--r--common/archcheck.cc82
-rw-r--r--ecp5/bitstream.cc8
3 files changed, 86 insertions, 8 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 344db1fb..b6fddcf1 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -193,7 +193,9 @@ aux_source_directory(3rdparty/json11 EXT_JSON11_FILES)
aux_source_directory(frontend/ FRONTEND_FILES)
set(COMMON_FILES ${COMMON_SRC_FILES} ${EXT_JSON11_FILES} ${JSON_PARSER_FILES} ${FRONTEND_FILES})
-set(CMAKE_BUILD_TYPE Release)
+if( NOT CMAKE_BUILD_TYPE )
+ set(CMAKE_BUILD_TYPE Release)
+endif()
if(CMAKE_CROSSCOMPILING)
set(BBA_IMPORT "IMPORTFILE-NOTFOUND" CACHE FILEPATH
diff --git a/common/archcheck.cc b/common/archcheck.cc
index 7b727e9b..12d4b5d3 100644
--- a/common/archcheck.cc
+++ b/common/archcheck.cc
@@ -38,21 +38,27 @@ void archcheck_names(const Context *ctx)
for (BelId bel : ctx->getBels()) {
IdString name = ctx->getBelName(bel);
BelId bel2 = ctx->getBelByName(name);
- log_assert(bel == bel2);
+ if(bel != bel2) {
+ log_error("bel != bel2, name = %s\n", name.c_str(ctx));
+ }
}
log_info("Checking wire names..\n");
for (WireId wire : ctx->getWires()) {
IdString name = ctx->getWireName(wire);
WireId wire2 = ctx->getWireByName(name);
- log_assert(wire == wire2);
+ if(wire != wire2) {
+ log_error("wire != wire2, name = %s\n", name.c_str(ctx));
+ }
}
#ifndef ARCH_ECP5
log_info("Checking pip names..\n");
for (PipId pip : ctx->getPips()) {
IdString name = ctx->getPipName(pip);
PipId pip2 = ctx->getPipByName(name);
- log_assert(pip == pip2);
+ if(pip != pip2) {
+ log_error("pip != pip2, name = %s\n", name.c_str(ctx));
+ }
}
#endif
log_break();
@@ -117,15 +123,77 @@ void archcheck_locs(const Context *ctx)
void archcheck_conn(const Context *ctx)
{
-#if 0
log_info("Checking connectivity data.\n");
- log_info("Checking all wires..\n");
+ log_info("Checking all wires...\n");
+
for (WireId wire : ctx->getWires())
{
- ...
+ for(BelPin belpin : ctx->getWireBelPins(wire)) {
+ WireId wire2 = ctx->getBelPinWire(belpin.bel, belpin.pin);
+ log_assert(wire == wire2);
+ }
+
+ for(PipId pip : ctx->getPipsDownhill(wire)) {
+ WireId wire2 = ctx->getPipSrcWire(pip);
+ log_assert(wire == wire2);
+ }
+
+ for(PipId pip : ctx->getPipsUphill(wire)) {
+ WireId wire2 = ctx->getPipDstWire(pip);
+ log_assert(wire == wire2);
+ }
+ }
+
+ log_info("Checking all BELs...\n");
+ for (BelId bel : ctx->getBels()) {
+ for(IdString pin : ctx->getBelPins(bel)) {
+ WireId wire = ctx->getBelPinWire(bel, pin);
+
+ if(wire == WireId()) {
+ continue;
+ }
+
+ bool found_belpin = false;
+ for(BelPin belpin : ctx->getWireBelPins(wire)) {
+ if(belpin.bel == bel && belpin.pin == pin) {
+ found_belpin = true;
+ break;
+ }
+ }
+
+ log_assert(found_belpin);
+ }
+ }
+
+ log_info("Checking all PIPs...\n");
+ for (PipId pip : ctx->getPips()) {
+ WireId src_wire = ctx->getPipSrcWire(pip);
+ if(src_wire != WireId()) {
+ bool found_pip = false;
+ for(PipId downhill_pip : ctx->getPipsDownhill(src_wire)) {
+ if(pip == downhill_pip) {
+ found_pip = true;
+ break;
+ }
+ }
+
+ log_assert(found_pip);
+ }
+
+ WireId dst_wire = ctx->getPipDstWire(pip);
+ if(dst_wire != WireId()) {
+ bool found_pip = false;
+ for(PipId uphill_pip : ctx->getPipsUphill(dst_wire)) {
+ if(pip == uphill_pip) {
+ found_pip = true;
+ break;
+ }
+ }
+
+ log_assert(found_pip);
+ }
}
-#endif
}
} // namespace
diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc
index d668c8bc..eddbc129 100644
--- a/ecp5/bitstream.cc
+++ b/ecp5/bitstream.cc
@@ -471,6 +471,14 @@ void fix_tile_names(Context *ctx, ChipConfig &cc)
cc.tiles[xform.second].cunknowns.push_back(cunknown);
cc.tiles.erase(xform.first);
}
+ for (auto &tg : cc.tilegroups) {
+ for (auto &t : tg.tiles) {
+ if (boost::ends_with(t, "BMID_0H"))
+ t.back() = 'V';
+ else if (boost::ends_with(t, "BMID_2"))
+ t.push_back('V');
+ }
+ }
}
}