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-rw-r--r--common/bits.cc11
-rw-r--r--common/bits.h8
-rw-r--r--common/dynamic_bitarray.h15
-rw-r--r--common/exclusive_state_groups.h4
-rw-r--r--common/placer1.cc2
-rw-r--r--common/placer_heap.cc2
-rw-r--r--common/router1.cc2
-rw-r--r--common/router2.cc2
-rw-r--r--common/scope_lock.h6
-rw-r--r--fpga_interchange/arch.cc2
-rw-r--r--fpga_interchange/arch.h2
-rw-r--r--fpga_interchange/luts.cc2
-rw-r--r--fpga_interchange/luts.h4
m---------tests0
14 files changed, 34 insertions, 28 deletions
diff --git a/common/bits.cc b/common/bits.cc
index 36c7539a..b20c2e86 100644
--- a/common/bits.cc
+++ b/common/bits.cc
@@ -19,10 +19,13 @@
*/
#include "bits.h"
+
#include <limits>
#include <stdexcept>
-namespace nextpnr {
+#include "log.h"
+
+NEXTPNR_NAMESPACE_BEGIN
int Bits::generic_popcount(unsigned int v)
{
@@ -37,7 +40,7 @@ int Bits::generic_popcount(unsigned int v)
int Bits::generic_ctz(unsigned int x)
{
if (x == 0) {
- throw std::runtime_error("Cannot call ctz with arg = 0");
+ log_error("Cannot call ctz with arg = 0");
}
for (size_t i = 0; i < std::numeric_limits<unsigned int>::digits; ++i) {
@@ -47,7 +50,7 @@ int Bits::generic_ctz(unsigned int x)
}
// Unreachable!
- throw std::runtime_error("Unreachable!");
+ log_error("Unreachable!");
}
-}; // namespace nextpnr
+NEXTPNR_NAMESPACE_END
diff --git a/common/bits.h b/common/bits.h
index d1598a8e..1d6bb8be 100644
--- a/common/bits.h
+++ b/common/bits.h
@@ -37,9 +37,9 @@
#pragma intrinsic(_BitScanForward, _BitScanReverse, __popcnt)
#endif
-// Uses plain nextpnr namespace to avoid header inclusion nightmare that is
-// "nextpnr.h".
-namespace nextpnr {
+#include "nextpnr_namespaces.h"
+
+NEXTPNR_NAMESPACE_BEGIN
struct Bits
{
@@ -71,6 +71,6 @@ struct Bits
}
};
-}; // namespace nextpnr
+NEXTPNR_NAMESPACE_END
#endif /* BITS_H */
diff --git a/common/dynamic_bitarray.h b/common/dynamic_bitarray.h
index 2b5ab2bc..605d59d5 100644
--- a/common/dynamic_bitarray.h
+++ b/common/dynamic_bitarray.h
@@ -17,18 +17,19 @@
*
*/
+#ifndef DYNAMIC_BITARRAY_H
+#define DYNAMIC_BITARRAY_H
+
#include <cstdint>
#include <limits>
#include <vector>
-// This class implements a simple dynamic bitarray, backed by some resizable
-// random access storage. The default is to use a std::vector<uint8_t>.
-
-#ifndef DYNAMIC_BITARRAY_H
-#define DYNAMIC_BITARRAY_H
+#include "nextpnr_namespaces.h"
-namespace nextpnr {
+NEXTPNR_NAMESPACE_BEGIN
+// This class implements a simple dynamic bitarray, backed by some resizable
+// random access storage. The default is to use a std::vector<uint8_t>.
template <typename Storage = std::vector<uint8_t>> class DynamicBitarray
{
public:
@@ -76,6 +77,6 @@ template <typename Storage = std::vector<uint8_t>> class DynamicBitarray
Storage storage;
};
-}; // namespace nextpnr
+NEXTPNR_NAMESPACE_END
#endif /* DYNAMIC_BITARRAY_H */
diff --git a/common/exclusive_state_groups.h b/common/exclusive_state_groups.h
index cd3f0bfa..68ce7c4e 100644
--- a/common/exclusive_state_groups.h
+++ b/common/exclusive_state_groups.h
@@ -111,10 +111,10 @@ template <size_t StateCount, typename StateType = int8_t, typename CountType = u
// Check whether the state group is now unselected or satified.
auto value = selected_states.to_ulong();
- auto number_selected = nextpnr::Bits::popcount(value);
+ auto number_selected = Bits::popcount(value);
if (number_selected == 1) {
// Group is no longer overconstrained.
- state = nextpnr::Bits::ctz(value);
+ state = Bits::ctz(value);
NPNR_ASSERT(selected_states[state]);
} else if (number_selected == 0) {
// Group is unselected.
diff --git a/common/placer1.cc b/common/placer1.cc
index c8b0d385..c2698ad9 100644
--- a/common/placer1.cc
+++ b/common/placer1.cc
@@ -144,7 +144,7 @@ class SAPlacer
{
log_break();
- nextpnr::ScopeLock<Context> lock(ctx);
+ ScopeLock<Context> lock(ctx);
size_t placed_cells = 0;
std::vector<CellInfo *> autoplaced;
diff --git a/common/placer_heap.cc b/common/placer_heap.cc
index 3ee8503c..97c9c4e5 100644
--- a/common/placer_heap.cc
+++ b/common/placer_heap.cc
@@ -151,7 +151,7 @@ class HeAPPlacer
{
auto startt = std::chrono::high_resolution_clock::now();
- nextpnr::ScopeLock<Context> lock(ctx);
+ ScopeLock<Context> lock(ctx);
place_constraints();
build_fast_bels();
seed_placement();
diff --git a/common/router1.cc b/common/router1.cc
index bffbc9f9..30ebc113 100644
--- a/common/router1.cc
+++ b/common/router1.cc
@@ -806,7 +806,7 @@ bool router1(Context *ctx, const Router1Cfg &cfg)
try {
log_break();
log_info("Routing..\n");
- nextpnr::ScopeLock<Context> lock(ctx);
+ ScopeLock<Context> lock(ctx);
auto rstart = std::chrono::high_resolution_clock::now();
log_info("Setting up routing queue.\n");
diff --git a/common/router2.cc b/common/router2.cc
index ccce5205..27f8ec0d 100644
--- a/common/router2.cc
+++ b/common/router2.cc
@@ -1218,7 +1218,7 @@ struct Router2
ThreadContext st;
int iter = 1;
- nextpnr::ScopeLock<Context> lock(ctx);
+ ScopeLock<Context> lock(ctx);
for (size_t i = 0; i < nets_by_udata.size(); i++)
route_queue.push_back(i);
diff --git a/common/scope_lock.h b/common/scope_lock.h
index 7b6c9dcd..2f0f767c 100644
--- a/common/scope_lock.h
+++ b/common/scope_lock.h
@@ -22,7 +22,9 @@
#include <stdexcept>
-namespace nextpnr {
+#include "nextpnr_namespaces.h"
+
+NEXTPNR_NAMESPACE_BEGIN
// Provides a simple RAII locking object. ScopeLock takes a lock when
// constructed, and releases the lock on destruction or if "unlock_early" is
@@ -60,6 +62,6 @@ template <typename LockingObject> class ScopeLock
bool locked_;
};
-}; // namespace nextpnr
+NEXTPNR_NAMESPACE_END
#endif /* SCOPE_LOCK_H */
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc
index e9dee580..3839f579 100644
--- a/fpga_interchange/arch.cc
+++ b/fpga_interchange/arch.cc
@@ -1267,7 +1267,7 @@ void Arch::report_invalid_bel(BelId bel, CellInfo *cell) const
nameOfBel(bel), mapping);
}
-void Arch::read_lut_equation(nextpnr::DynamicBitarray<> *equation, const Property &equation_parameter) const
+void Arch::read_lut_equation(DynamicBitarray<> *equation, const Property &equation_parameter) const
{
equation->fill(false);
std::string eq_str = equation_parameter.as_string();
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index a171ba55..05bc1a94 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -1737,7 +1737,7 @@ struct Arch : ArchAPI<ArchRanges>
std::regex raw_bin_constant;
std::regex verilog_bin_constant;
std::regex verilog_hex_constant;
- void read_lut_equation(nextpnr::DynamicBitarray<> *equation, const Property &equation_parameter) const;
+ void read_lut_equation(DynamicBitarray<> *equation, const Property &equation_parameter) const;
bool route_vcc_to_unused_lut_pins();
};
diff --git a/fpga_interchange/luts.cc b/fpga_interchange/luts.cc
index 49f934a4..6e24847f 100644
--- a/fpga_interchange/luts.cc
+++ b/fpga_interchange/luts.cc
@@ -25,7 +25,7 @@
NEXTPNR_NAMESPACE_BEGIN
bool rotate_and_merge_lut_equation(std::vector<LogicLevel> *result, const LutBel &lut_bel,
- const nextpnr::DynamicBitarray<> &old_equation, const std::vector<int32_t> &pin_map,
+ const DynamicBitarray<> &old_equation, const std::vector<int32_t> &pin_map,
uint32_t used_pins)
{
// pin_map maps pin indicies from the old pin to the new pin.
diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h
index 333df36e..3500c9d3 100644
--- a/fpga_interchange/luts.h
+++ b/fpga_interchange/luts.h
@@ -46,7 +46,7 @@ struct LutCell
std::vector<IdString> pins;
std::unordered_set<IdString> lut_pins;
std::unordered_set<IdString> vcc_pins;
- nextpnr::DynamicBitarray<> equation;
+ DynamicBitarray<> equation;
};
struct LutBel
@@ -94,7 +94,7 @@ struct LutMapper
//
// If a conflict arises, return false and result is in an indeterminate state.
bool rotate_and_merge_lut_equation(std::vector<LogicLevel> *result, const LutBel &lut_bel,
- const nextpnr::DynamicBitarray<> &old_equation, const std::vector<size_t> &pin_map,
+ const DynamicBitarray<> &old_equation, const std::vector<size_t> &pin_map,
uint32_t used_pins);
NEXTPNR_NAMESPACE_END
diff --git a/tests b/tests
-Subproject 34c511444eff51291fa732369e434ff687de310
+Subproject a751e0d9081477e33c620b5224ccd2026f2fa0c
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 02:34:32 +0000