From da52117ccd5b4147f64dc7345357ec5439cd7543 Mon Sep 17 00:00:00 2001 From: Claire Wolf Date: Wed, 19 Aug 2020 10:35:39 +0200 Subject: Fix links and email addr in index.html Signed-off-by: Claire Wolf --- docs/index.html | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/docs/index.html b/docs/index.html index 19628d8..a667d87 100644 --- a/docs/index.html +++ b/docs/index.html @@ -20,9 +20,9 @@ 2017-03-13: Released support for LP384 chips (in all package variants).
2016-02-07: Support for all package variants of LP1K, LP4K, LP8K and HX1K, HX4K, and HX8K.
2016-01-17: First release of IceTime timing analysis. Video: https://youtu.be/IG5CpFJRnOk
-2015-12-27: Presentation of the IceStorm flow at 32C3 (Video on Youtube).
+2015-12-27: Presentation of the IceStorm flow at 32C3 (Video on Youtube).
2015-07-19: Released support for 8k chips. Moved IceStorm source code to GitHub.
-2015-05-27: We have a working fully Open Source flow with Yosys and Arachne-pnr! Video: http://youtu.be/yUiNlmvVOq8
+2015-05-27: We have a working fully Open Source flow with Yosys and Arachne-pnr! Video: http://youtu.be/yUiNlmvVOq8
2015-04-13: Complete rewrite of IceUnpack, added IcePack, some major documentation updates
2015-03-22: First public release and short YouTube video demonstrating our work: http://youtu.be/u1ZHcSNDQMM

@@ -33,7 +33,7 @@ Project IceStorm aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files. The IceStorm flow (Yosys, Yosys, Arachne-pnr, and IceStorm) is a fully open source Verilog-to-Bitstream flow for iCE40 FPGAs.

@@ -115,7 +115,7 @@ Current work focuses on further improving our timing analysis flow.

How do I use the Fully Open Source iCE40 Flow?

-Synthesis for iCE40 FPGAs can be done with Yosys. +Synthesis for iCE40 FPGAs can be done with Yosys. Place-and-route can be done with arachne-pnr. Here is an example script for implementing and programming the rot example from @@ -190,7 +190,7 @@ make -j$(nproc) sudo make install

-Installing Yosys (Verilog synthesis): +Installing Yosys (Verilog synthesis): 

git clone https://github.com/YosysHQ/yosys.git yosys
@@ -231,7 +231,7 @@ The IceStorm Tools are a couple of small programs for working with iCE40 bitstre
 ASCII representation of it. The complete Open Source iCE40 Flow consists of the IceStorm Tools, Arachne-PNR, and Yosys.
+href="http://bygone.clairexen.net/yosys/">Yosys.
 

 
 
IcePack/IceUnpack

@@ -521,7 +521,7 @@ endmodule

Links

-Links to related projects. Contact me at clifford@clifford.at if you have an interesting and relevant link. +Links to related projects. Contact me at claire@clairexen.net if you have an interesting and relevant link.