From 35bd638b4cad985a235d19374f7a37f64c6b47c8 Mon Sep 17 00:00:00 2001
From: David Shah <davey1576@gmail.com>
Date: Mon, 8 Jan 2018 17:38:05 +0000
Subject: Add SPI enable bits to docs

---
 docs/ultraplus.html | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/docs/ultraplus.html b/docs/ultraplus.html
index dac648a..b5dda62 100644
--- a/docs/ultraplus.html
+++ b/docs/ultraplus.html
@@ -391,6 +391,10 @@ where multiple bits are used to enable an IP they are labeled as <span style="fo
 	<tr><td>SOE</td><td>(0, 20, slf_op_5)</td><td>(25, 20, slf_op_5)</td></tr>
 	<tr><td>SPIIRQ</td><td>(0, 20, slf_op_2)</td><td>(25, 20, slf_op_2)</td></tr>
 	<tr><td>SPIWKUP</td><td>(0, 20, slf_op_3)</td><td>(25, 20, slf_op_3)</td></tr>
+	<tr><td><em>SPI_ENABLE_0</em></td><td><em>(7, 0, cbit2usealt_in_0)</em></td><td><em>(23, 0, cbit2usealt_in_0)</em></td></tr>
+	<tr><td><em>SPI_ENABLE_1</em></td><td><em>(7, 0, cbit2usealt_in_1)</em></td><td><em>(24, 0, cbit2usealt_in_0)</em></td></tr>
+	<tr><td><em>SPI_ENABLE_2</em></td><td><em>(6, 0, cbit2usealt_in_0)</em></td><td><em>(23, 0, cbit2usealt_in_1)</em></td></tr>
+	<tr><td><em>SPI_ENABLE_3</em></td><td><em>(6, 0, cbit2usealt_in_1)</em></td><td><em>(24, 0, cbit2usealt_in_1)</em></td></tr>
 	</table>
 </td><td>
 	<table class="cstab">
-- 
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