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* Merge pull request #283 from smunaut/miscMiodrag Milanović2022-05-301-10/+51
|\ | | | | Misc improvements to iceprog
| * iceprog: Use open-drain output to drive SS and Reset lineSylvain Munaut2021-12-171-5/+5
| | | | | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
| * iceprog: Improve reset to disable both CRM and QPISylvain Munaut2021-12-171-0/+6
| | | | | | | | | | | | | | | | | | It's hard to cover 100% of cases, but this seems to improve probability that a reset works, at least for me on the icebreaker. Some other flash have a different QPI disable command though :/ Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
| * iceprog: Add option that set QE=1 bit in SR2Sylvain Munaut2021-12-171-5/+40
| | | | | | | | | | | | | | | | | | | | | | | | This is useful when testing litex SoC that rely on that bit being set The setting is non-volatile so it only needs to be done once in case you happen to have used a flash chip that's not by default QE=1 (This has been designed for winbond flash. Others might use different bit ...) Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* | Merge pull request #291 from maikmerten/masterMiodrag Milanović2022-05-301-0/+10
|\ \ | | | | | | icetime: Parse PCF files with -pullup and -pullup_resistor in set_io directives
| * | icetime: indent with tabsMaik Merten2022-03-051-9/+9
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| * | icetime PCF parsing: handle -pullup and -pullup_resistor in set_io constraintsMaik Merten2022-03-051-0/+10
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* | | Merge pull request #296 from RafaelLeeImg/merge_request_float_exceptionMiodrag Milanović2022-05-231-3/+3
|\ \ \ | | | | | | | | Fix float exception when value is less than 100
| * | | Fix float exception when value is less than 100Rafael Lee2022-04-131-3/+3
|/ / / | | | | | | | | | Signed-off-by: Rafael Lee <rafaellee.img@gmail.com>
* | | Merge pull request #294 from YosysHQ/gatecat/lut-false-pathgatecat2022-03-291-5/+38
|\ \ \ | | | | | | | | icetime: Ignore false paths through LUTs based on function
| * | | icetime: Ignore false paths through LUTs based on functiongatecat2022-03-291-5/+38
|/ / / | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | Merge pull request #293 from YosysHQ/gatecat/cb121-fixgatecat2022-03-251-1/+0
|\ \ \ | |/ / |/| | icebox: cb121 does have a PLL
| * | icebox: cb121 does have a PLLgatecat2022-03-251-1/+0
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #289 from osresearch/bitstream-prgatecat2022-01-221-5/+7
|\ \ | | | | | | docs/format.html: document bram/cram read-back commands
| * | docs/format.html: document bram/cram read-back commandsTrammell Hudson2022-01-221-5/+7
|/ / | | | | | | | | | | | | | | | | The Lattice tools use these additional commands to read-back the BRAM and CRAM after programming to validate that it was written correctly. `iceprog` doesn't use this right now, so this is just for documentation purposes. Signed-off-by: Trammell Hudson <hudson@trmm.net>
* | Merge pull request #287 from projf/update-urlCatherine2022-01-021-1/+1
|\ \ | |/ |/| Update URL for web site.
| * Update URL for web site.Will Green2021-11-281-1/+1
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* Merge pull request #282 from jkiv/iceprog-ignorig-fixMiodrag Milanović2021-09-061-1/+1
|\ | | | | [iceprog] Fixed typo in error message: "Ignorig"
| * [iceprog] Fixed typo in error message: "Ignorig"Jon Kivinen2021-05-031-1/+1
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* | Update variable name to PYTHON3Miodrag Milanovic2021-09-064-32/+32
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* | Merge pull request #239 from xobs/python-bin-nameMiodrag Milanović2021-09-064-30/+32
|\ \ | | | | | | Use $(PYTHON) in Makefiles instead of `python3`
| * | icetime: use $(PYTHON) in MakefileSean Cross2019-10-221-1/+1
| | | | | | | | | | | | | | | | | | Allow the name of the Python interpreter to be changed. Signed-off-by: Sean Cross <sean@xobs.io>
| * | icefuzz: update Makefile to use $(PYTHON) variableSean Cross2019-10-221-20/+20
| | | | | | | | | | | | | | | | | | Don't hardcode `python3` as the name of the Python interpreter. Signed-off-by: Sean Cross <sean@xobs.io>
| * | icebox: use $(PYTHON) variable in MakefileSean Cross2019-10-221-9/+9
| | | | | | | | | | | | | | | | | | Allow `python` to be provided by an interpreter other than `python3`. Signed-off-by: Sean Cross <sean@xobs.io>
| * | config: add a variable for python interpreterSean Cross2019-10-221-0/+2
| | | | | | | | | | | | | | | | | | | | | This variable can be overridden on platforms where python is not called `python3`. Signed-off-by: Sean Cross <sean@xobs.io>
* | | Fixes for macOSMiodrag Milanovic2021-09-062-28/+27
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* | | Merge pull request #276 from esden/progressClaire Xen2021-08-301-0/+11
|\ \ \ | |_|/ |/| | iceprog: Add write and read progress indication.
| * | iceprog: Add write and read progress indication.Piotr Esden-Tempski2021-01-161-0/+11
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* | | Use --recursive for nextpnr clonegatecat2021-03-091-1/+1
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | Merge pull request #279 from YosysHQ/update-gitignorewhitequark2021-03-054-0/+7
|\ \ \ | |/ / |/| | Add more build products to .gitignore
| * | Add more build products to .gitignore.whitequark2021-03-054-0/+7
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* | Merge pull request #275 from nils1603/feature/ip_support_u4kDavid Shah2020-12-044-0/+731
|\ \ | | | | | | added I2C and SPI for u4k to database
| * | added I2C and SPI for u4k to databaseNils Albartus2020-12-044-0/+731
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* | Fix links and email addr in index.htmlClaire Wolf2020-08-191-10/+10
| | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | Use YosysHQ in index.htmlClaire Wolf2020-08-191-7/+7
| | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | Use Claire in index.htmlClaire Wolf2020-08-191-4/+4
| | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | Merge pull request #264 from YosysHQ/mmicko/improvementsMiodrag Milanović2020-07-082-8/+18
|\ \ | | | | | | Support rest of parts by icetime
| * | Enable rest of lattice parts in icetimeMiodrag Milanovic2020-07-082-8/+16
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| * | Prevent rebuilding timing filesMiodrag Milanovic2020-07-081-0/+2
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* | Merge pull request #263 from YosysHQ/fix_vlog_up5kDavid Shah2020-07-021-1/+4
|\ \ | | | | | | Fix icebox_vlog for up5k
| * | Fix icebox_vlog for up5kDavid Shah2020-06-291-1/+4
|/ / | | | | | | | | | | Since ce1d811, SHIFTREG_DIV_MODE is now 2 bits for the up5k Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #262 from whitequark/icebram-fixclairexen2020-06-261-9/+19
|\ \ | | | | | | Fix icebram
| * | icebram: add WASI platform support.whitequark2020-06-261-0/+4
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| * | icebram: refactor seeding logic.whitequark2020-06-261-8/+14
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| * | Revert "Make icebram deterministic"whitequark2020-06-261-2/+2
|/ / | | | | | | This reverts commit 2679c91b8a158aa4aca49dd726955e8c63cf7bef.
* | Merge pull request #257 from smunaut/ice40_shiftreg_div_modeClaire Wolf2020-06-251-1/+2
|\ \ | | | | | | icebox: Add support for the bit 1 of SHIFTREG_DIV_MODE
| * | icebox: Add support for the bit 1 of SHIFTREG_DIV_MODE on UP5kSylvain Munaut2020-06-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows selection of the div-by-5 mode of the PLL. This bit can't be fuzzed because it's not supported by the lattice tools at all ... This only works for sure on the UP5k. I tested HX8k and it didn't support it, so I'm only adding this on the known working FPGA. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* | | Merge pull request #261 from whitequark/icepack-usageClaire Wolf2020-06-251-4/+4
|\ \ \ | | | | | | | | icepack: show program name in usage
| * | | icepack: show program name in usage.whitequark2020-06-241-4/+4
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* | | Merge pull request #260 from whitequark/patch-1Claire Wolf2020-06-251-2/+2
|\ \ \ | | | | | | | | Make icebram deterministic
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