/* * nextpnr -- Next Generation Place and Route * * Copyright (C) 2018 David Shah * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ #include "io.h" NEXTPNR_NAMESPACE_BEGIN std::string iovoltage_to_str(IOVoltage v) { switch (v) { case IOVoltage::VCC_3V3: return "3V3"; case IOVoltage::VCC_2V5: return "2V5"; case IOVoltage::VCC_1V8: return "1V8"; case IOVoltage::VCC_1V5: return "1V5"; case IOVoltage::VCC_1V35: return "1V35"; case IOVoltage::VCC_1V2: return "1V2"; } NPNR_ASSERT_FALSE("unknown IO voltage"); } IOVoltage iovoltage_from_str(const std::string &name) { if (name == "3V3") return IOVoltage::VCC_3V3; if (name == "2V5") return IOVoltage::VCC_2V5; if (name == "1V8") return IOVoltage::VCC_1V8; if (name == "1V5") return IOVoltage::VCC_1V5; if (name == "1V35") return IOVoltage::VCC_1V35; if (name == "1V2") return IOVoltage::VCC_1V2; NPNR_ASSERT_FALSE("unknown IO voltage"); } std::string iotype_to_str(IOType type) { if (type == IOType::TYPE_NONE) return "NONE"; #define X(t) \ if (type == IOType::t) \ return #t; #include "iotypes.inc" #undef X if (type == IOType::TYPE_UNKNOWN) return ""; NPNR_ASSERT_FALSE("unknown IO type"); } IOType ioType_from_str(const std::string &name) { if (name == "NONE") return IOType::TYPE_NONE; #define X(t) \ if (name == #t) \ return IOType::t; #include "iotypes.inc" return IOType::TYPE_UNKNOWN; } IOVoltage get_vccio(IOType type) { switch (type) { case IOType::LVTTL33: case IOType::LVCMOS33: case IOType::LVCMOS33D: case IOType::LVPECL33: case IOType::LVPECL33E: return IOVoltage::VCC_3V3; case IOType::LVCMOS25: case IOType::LVCMOS25D: case IOType::LVDS: case IOType::SLVS: case IOType::SUBLVDS: case IOType::LVDS25E: case IOType::MLVDS25: case IOType::MLVDS25E: case IOType::BLVDS25: return IOVoltage::VCC_2V5; case IOType::LVCMOS18: case IOType::LVCMOS18D: case IOType::SSTL18_I: case IOType::SSTL18_II: case IOType::SSTL18D_I: case IOType::SSTL18D_II: return IOVoltage::VCC_1V8; case IOType::LVCMOS15: case IOType::SSTL15_I: case IOType::SSTL15_II: case IOType::SSTL15D_I: case IOType::SSTL15D_II: return IOVoltage::VCC_1V5; case IOType::SSTL135_I: case IOType::SSTL135_II: case IOType::SSTL135D_I: case IOType::SSTL135D_II: return IOVoltage::VCC_1V35; case IOType::LVCMOS12: case IOType::HSUL12: case IOType::HSUL12D: return IOVoltage::VCC_1V2; default: NPNR_ASSERT_FALSE("unknown IO type, unable to determine VccIO"); } } bool is_strong_vccio_constraint(IOType type, PortType dir, IOSide side) { if (dir == PORT_OUT || dir == PORT_INOUT) return true; switch (type) { case IOType::TYPE_NONE: case IOType::LVCMOS33D: case IOType::LVPECL33: case IOType::LVDS: case IOType::MLVDS25: case IOType::BLVDS25: case IOType::SLVS: case IOType::SUBLVDS: case IOType::LVCMOS12: case IOType::HSUL12: case IOType::HSUL12D: return false; case IOType::LVCMOS33: case IOType::LVTTL33: case IOType::LVCMOS25: return (side == IOSide::LEFT || side == IOSide::RIGHT); default: return true; } } bool is_differential(IOType type) { switch (type) { case IOType::LVCMOS33D: case IOType::LVCMOS25D: case IOType::LVPECL33: case IOType::LVDS: case IOType::MLVDS25: case IOType::BLVDS25: case IOType::SLVS: case IOType::SUBLVDS: case IOType::LVCMOS18D: case IOType::SSTL18D_I: case IOType::SSTL18D_II: case IOType::SSTL15D_I: case IOType::SSTL15D_II: case IOType::SSTL135D_I: case IOType::SSTL135D_II: case IOType::HSUL12D: return true; default: return false; } } bool is_referenced(IOType type) { switch (type) { case IOType::SSTL18_I: case IOType::SSTL18_II: case IOType::SSTL18D_I: case IOType::SSTL18D_II: case IOType::SSTL15_I: case IOType::SSTL15_II: case IOType::SSTL15D_I: case IOType::SSTL15D_II: case IOType::SSTL135_I: case IOType::SSTL135_II: case IOType::SSTL135D_I: case IOType::SSTL135D_II: case IOType::HSUL12: case IOType::HSUL12D: return true; default: return false; } } bool valid_loc_for_io(IOType type, PortType dir, IOSide side, int z) { bool is_lr = side == IOSide::LEFT || side == IOSide::RIGHT; if (is_referenced(type) && !is_lr) return false; if (is_differential(type) && (!is_lr || ((z % 2) == 1))) return false; if ((type == IOType::LVCMOS18D || type == IOType::LVDS) && (dir == PORT_OUT || dir == PORT_INOUT) && z != 0) return false; return true; } NEXTPNR_NAMESPACE_END 00 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
--  GHDL Run Time (GRT) std_logic_1664 subprograms.
--  Copyright (C) 2014 Tristan Gingold
--
--  GHDL is free software; you can redistribute it and/or modify it under
--  the terms of the GNU General Public License as published by the Free
--  Software Foundation; either version 2, or (at your option) any later
--  version.
--
--  GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
--  WARRANTY; without even the implied warranty of MERCHANTABILITY or
--  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
--  for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with GCC; see the file COPYING.  If not, write to the Free
--  Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--  02111-1307, USA.
--
--  As a special exception, if other files instantiate generics from this
--  unit, or you link this unit with other files to produce an executable,
--  this unit does not by itself cause the resulting executable to be
--  covered by the GNU General Public License. This exception does not
--  however invalidate any other reasons why the executable file might be
--  covered by the GNU Public License.

with Grt.Lib;
with Grt.Errors; use Grt.Errors;
with Grt.Severity; use Grt.Severity;

package body Grt.Std_Logic_1164 is
   Assert_DC_Msg : constant String :=
     "STD_LOGIC_1164: '-' operand for matching ordering operator";

   Assert_DC_Msg_Bound : constant Std_String_Bound :=
     (Dim_1 => (Left => 1, Right => Assert_DC_Msg'Length, Dir => Dir_To,
                Length => Assert_DC_Msg'Length));

   Assert_DC_Msg_Str : aliased constant Std_String :=
     (Base => To_Std_String_Basep (Assert_DC_Msg'Address),
      Bounds => To_Std_String_Boundp (Assert_DC_Msg_Bound'Address));

   Filename : constant String := "std_logic_1164.vhdl" & NUL;
   Loc : aliased constant Ghdl_Location :=
     (Filename => To_Ghdl_C_String (Filename'Address),
      Line => 58,
      Col => 3);

   procedure Assert_Not_Match
   is
      use Grt.Lib;
   begin
      Ghdl_Ieee_Assert_Failed
        (To_Std_String_Ptr (Assert_DC_Msg_Str'Address), Error_Severity,
         To_Ghdl_Location_Ptr (Loc'Address));
   end Assert_Not_Match;

   function Ghdl_Std_Ulogic_Match_Eq (L, R : Ghdl_E8) return Ghdl_E8
   is
      Left : constant Std_Ulogic := Std_Ulogic'Val (L);
      Right : constant Std_Ulogic := Std_Ulogic'Val (R);
   begin
      return Std_Ulogic'Pos (Match_Eq_Table (Left, Right));
   end Ghdl_Std_Ulogic_Match_Eq;

   function Ghdl_Std_Ulogic_Match_Ne (L, R : Ghdl_E8) return Ghdl_E8
   is
      Left : constant Std_Ulogic := Std_Ulogic'Val (L);
      Right : constant Std_Ulogic := Std_Ulogic'Val (R);
   begin
      return Std_Ulogic'Pos (Not_Table (Match_Eq_Table (Left, Right)));
   end Ghdl_Std_Ulogic_Match_Ne;

   function Ghdl_Std_Ulogic_Match_Lt (L, R : Ghdl_E8) return Ghdl_E8
   is
      Left : constant Std_Ulogic := Std_Ulogic'Val (L);
      Right : constant Std_Ulogic := Std_Ulogic'Val (R);
   begin
      if Left = '-' or Right = '-' then
         Assert_Not_Match;
      end if;
      return Std_Ulogic'Pos (Match_Lt_Table (Left, Right));
   end Ghdl_Std_Ulogic_Match_Lt;

   function Ghdl_Std_Ulogic_Match_Le (L, R : Ghdl_E8) return Ghdl_E8
   is
      Left : constant Std_Ulogic := Std_Ulogic'Val (L);
      Right : constant Std_Ulogic := Std_Ulogic'Val (R);
   begin
      if Left = '-' or Right = '-' then
         Assert_Not_Match;
      end if;
      return Std_Ulogic'Pos (Or_Table (Match_Lt_Table (Left, Right),
                                       Match_Eq_Table (Left, Right)));
   end Ghdl_Std_Ulogic_Match_Le;

   Assert_Arr_Msg : constant String :=
     "parameters of '?=' array operator are not of the same length";

   Assert_Arr_Msg_Bound : constant Std_String_Bound :=
     (Dim_1 => (Left => 1, Right => Assert_Arr_Msg'Length, Dir => Dir_To,
                Length => Assert_Arr_Msg'Length));

   Assert_Arr_Msg_Str : aliased constant Std_String :=
     (Base => To_Std_String_Basep (Assert_Arr_Msg'Address),
      Bounds => To_Std_String_Boundp (Assert_Arr_Msg_Bound'Address));

   function Ghdl_Std_Ulogic_Array_Match_Eq (L : Ghdl_Ptr;
                                            L_Len : Ghdl_Index_Type;
                                            R : Ghdl_Ptr;
                                            R_Len : Ghdl_Index_Type)
                                           return Ghdl_I32
   is
      use Grt.Lib;
      L_Arr : constant Ghdl_E8_Array_Base_Ptr :=
        To_Ghdl_E8_Array_Base_Ptr (L);
      R_Arr : constant Ghdl_E8_Array_Base_Ptr :=
        To_Ghdl_E8_Array_Base_Ptr (R);
      Res : Std_Ulogic := '1';
   begin
      if L_Len /= R_Len then
         Ghdl_Ieee_Assert_Failed
           (To_Std_String_Ptr (Assert_Arr_Msg_Str'Address), Error_Severity,
            To_Ghdl_Location_Ptr (Loc'Address));
         return Std_Ulogic'Pos ('0');
      end if;

      for I in 1 .. L_Len loop
         declare
            Le : constant Std_Ulogic := Std_Ulogic'Val (L_Arr (I - 1));
            Re : constant Std_Ulogic := Std_Ulogic'Val (R_Arr (I - 1));
         begin
            Res := And_Table (Res, Match_Eq_Table (Le, Re));
         end;
      end loop;
      return Std_Ulogic'Pos (Res);
   end Ghdl_Std_Ulogic_Array_Match_Eq;

   function Ghdl_Std_Ulogic_Array_Match_Ne (L : Ghdl_Ptr;
                                            L_Len : Ghdl_Index_Type;
                                            R : Ghdl_Ptr;
                                            R_Len : Ghdl_Index_Type)
                                           return Ghdl_I32 is
   begin
      return Std_Ulogic'Pos
        (Not_Table (Std_Ulogic'Val
                      (Ghdl_Std_Ulogic_Array_Match_Eq (L, L_Len, R, R_Len))));
   end Ghdl_Std_Ulogic_Array_Match_Ne;
end Grt.Std_Logic_1164;