From d3457b9db47199d65b3d038f671c82d660631135 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 11 Mar 2017 07:05:14 +0100
Subject: Add testcase for #310

---
 testsuite/gna/issue310/b.vhdl       |  4 ++++
 testsuite/gna/issue310/bb.vhdl      |  2 ++
 testsuite/gna/issue310/bbb.vhdl     | 18 ++++++++++++++++++
 testsuite/gna/issue310/testsuite.sh | 13 +++++++++++++
 4 files changed, 37 insertions(+)
 create mode 100644 testsuite/gna/issue310/b.vhdl
 create mode 100644 testsuite/gna/issue310/bb.vhdl
 create mode 100644 testsuite/gna/issue310/bbb.vhdl
 create mode 100755 testsuite/gna/issue310/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/gna/issue310/b.vhdl b/testsuite/gna/issue310/b.vhdl
new file mode 100644
index 000000000..a21cd4676
--- /dev/null
+++ b/testsuite/gna/issue310/b.vhdl
@@ -0,0 +1,4 @@
+package b is
+    generic ( X: natural := 4);
+    type m is array (natural range <>) of bit_vector (X - 1 downto 0);
+end package;
diff --git a/testsuite/gna/issue310/bb.vhdl b/testsuite/gna/issue310/bb.vhdl
new file mode 100644
index 000000000..4f8e87d0e
--- /dev/null
+++ b/testsuite/gna/issue310/bb.vhdl
@@ -0,0 +1,2 @@
+package bb is new work.b generic map ( X => 6);
+
diff --git a/testsuite/gna/issue310/bbb.vhdl b/testsuite/gna/issue310/bbb.vhdl
new file mode 100644
index 000000000..b2ef9a1b4
--- /dev/null
+++ b/testsuite/gna/issue310/bbb.vhdl
@@ -0,0 +1,18 @@
+--  package bb is new work.b generic map ( X => 6);
+
+use work.bb.all;
+
+entity bbb is
+end entity;
+
+architecture a of bbb is
+
+begin
+    process
+        variable n:  m (0 to 0);
+    begin
+        report "X = " & integer'image(X);
+        report "m'left = " & integer'image(n(0)'left);
+        wait;
+    end process;
+end architecture;
diff --git a/testsuite/gna/issue310/testsuite.sh b/testsuite/gna/issue310/testsuite.sh
new file mode 100755
index 000000000..15ce43718
--- /dev/null
+++ b/testsuite/gna/issue310/testsuite.sh
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze b.vhdl
+analyze bb.vhdl
+analyze bbb.vhdl
+elab_simulate bbb
+
+clean
+
+echo "Test successful"
-- 
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