From 7e6fc375fcd573489204fbda6cddb863d6a132cc Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 23 Mar 2020 07:29:33 +0100 Subject: testsuite/synth: add a test for #1170 --- testsuite/synth/issue1170/bug.vhdl | 20 ++++++++++++++++++++ testsuite/synth/issue1170/testsuite.sh | 8 ++++++++ 2 files changed, 28 insertions(+) create mode 100644 testsuite/synth/issue1170/bug.vhdl create mode 100755 testsuite/synth/issue1170/testsuite.sh (limited to 'testsuite') diff --git a/testsuite/synth/issue1170/bug.vhdl b/testsuite/synth/issue1170/bug.vhdl new file mode 100644 index 000000000..d68ad2beb --- /dev/null +++ b/testsuite/synth/issue1170/bug.vhdl @@ -0,0 +1,20 @@ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity bug is + port( + dummy : in std_ulogic + ); +end bug; + +architecture behav of bug is + constant LEN : positive := 2; +begin + outer : block + begin + gen : for i in 0 to LEN-1 generate + --empty + end generate; + end block; +end architecture; diff --git a/testsuite/synth/issue1170/testsuite.sh b/testsuite/synth/issue1170/testsuite.sh new file mode 100755 index 000000000..121ca9a6a --- /dev/null +++ b/testsuite/synth/issue1170/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_analyze bug +clean + +echo "Test successful" -- cgit v1.2.3