From 4202d78df0bb056f3036b5c9bc789a10148a22c8 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 1 Oct 2019 07:42:08 +0200
Subject: testsuite/synth: add testcase for ghdlsynth-beta 44

---
 testsuite/synth/synth44/record_test.vhdl | 15 +++++++++++++++
 testsuite/synth/synth44/testsuite.sh     | 11 +++++++++++
 2 files changed, 26 insertions(+)
 create mode 100644 testsuite/synth/synth44/record_test.vhdl
 create mode 100755 testsuite/synth/synth44/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/synth/synth44/record_test.vhdl b/testsuite/synth/synth44/record_test.vhdl
new file mode 100644
index 000000000..91819faff
--- /dev/null
+++ b/testsuite/synth/synth44/record_test.vhdl
@@ -0,0 +1,15 @@
+entity record_test is
+  port (
+    o : out integer
+  );
+end record_test;
+
+architecture rtl of record_test is
+  type t_record is record
+    int  : integer range 0 to 15;
+  end record t_record;
+  constant rec_constant : t_record := (int => 8);
+  signal int_signal : integer range 0 to rec_constant.int := 4;
+begin
+  o <= int_signal;
+end rtl;
diff --git a/testsuite/synth/synth44/testsuite.sh b/testsuite/synth/synth44/testsuite.sh
new file mode 100755
index 000000000..df471fb4d
--- /dev/null
+++ b/testsuite/synth/synth44/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+for f in record_test; do
+  synth $f.vhdl -e $f > syn_$f.vhdl
+#  analyze syn_$f.vhdl
+done
+clean
+
+echo "Test successful"
-- 
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