From fa0f97b6416f1015823f574f52c1343eb9058e16 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 18 Oct 2022 18:43:49 +0200 Subject: testsuite/synth: add a test for #2222 --- testsuite/synth/issue2222/ent.vhdl | 21 +++++++++++++++++++++ testsuite/synth/issue2222/testsuite.sh | 7 +++++++ 2 files changed, 28 insertions(+) create mode 100644 testsuite/synth/issue2222/ent.vhdl create mode 100755 testsuite/synth/issue2222/testsuite.sh (limited to 'testsuite/synth') diff --git a/testsuite/synth/issue2222/ent.vhdl b/testsuite/synth/issue2222/ent.vhdl new file mode 100644 index 000000000..342713dc8 --- /dev/null +++ b/testsuite/synth/issue2222/ent.vhdl @@ -0,0 +1,21 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port (o : out std_ulogic); +end; + +architecture a of ent is + procedure proc ( + signal pin : out std_ulogic; + constant drive_pin : boolean := false + ) is + begin + if drive_pin then + pin <= '1'; + end if; + end procedure; +begin + o <= '1'; + proc(pin => o); +end; diff --git a/testsuite/synth/issue2222/testsuite.sh b/testsuite/synth/issue2222/testsuite.sh new file mode 100755 index 000000000..08ebf93a4 --- /dev/null +++ b/testsuite/synth/issue2222/testsuite.sh @@ -0,0 +1,7 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only ent + +echo "Test successful" -- cgit v1.2.3