From eb3d32a6de8822eb87a6bfd72dc1c94f9ff9a107 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 17 Sep 2019 18:32:12 +0200 Subject: Add missing file for previous commit. --- testsuite/synth/var01/var06.vhdl | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 testsuite/synth/var01/var06.vhdl (limited to 'testsuite/synth/var01/var06.vhdl') diff --git a/testsuite/synth/var01/var06.vhdl b/testsuite/synth/var01/var06.vhdl new file mode 100644 index 000000000..ca7f103b2 --- /dev/null +++ b/testsuite/synth/var01/var06.vhdl @@ -0,0 +1,24 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity var06 is + port (mask : std_logic_vector (1 downto 0); + val : std_logic_vector (15 downto 0); + res : out std_logic_vector (15 downto 0)); +end var06; + +architecture behav of var06 is +begin + process (all) + variable t : std_logic_vector (15 downto 0); + begin + t := (others => '0'); + if mask (0) = '1' then + t (7 downto 0) := val (7 downto 0); + end if; + if mask (1) = '1' then + t (15 downto 8) := val (15 downto 8); + end if; + res <= t; + end process; +end behav; -- cgit v1.2.3