From 06202188e0e88c0096518415413c08bd0471644b Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 9 May 2020 18:32:41 +0200
Subject: testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#104

---
 testsuite/synth/synth104/tb_case02.vhdl | 39 +++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 testsuite/synth/synth104/tb_case02.vhdl

(limited to 'testsuite/synth/synth104/tb_case02.vhdl')

diff --git a/testsuite/synth/synth104/tb_case02.vhdl b/testsuite/synth/synth104/tb_case02.vhdl
new file mode 100644
index 000000000..9f781bb29
--- /dev/null
+++ b/testsuite/synth/synth104/tb_case02.vhdl
@@ -0,0 +1,39 @@
+entity tb_case02 is
+end tb_case02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_case02 is
+  signal sel : unsigned (3 downto 0);
+  signal det : std_logic_vector (1 downto 0);
+begin
+  dut: entity work.case02
+    port map (sel, det);
+
+  process
+  begin
+    sel <= "0000";
+    wait for 1 ns;
+    assert det = "00" severity failure;
+
+    sel <= "0010";
+    wait for 1 ns;
+    assert det = "01" severity failure;
+
+    sel <= "0110";
+    wait for 1 ns;
+    assert det = "01" severity failure;
+
+    sel <= "1010";
+    wait for 1 ns;
+    assert det = "10" severity failure;
+
+    sel <= "1111";
+    wait for 1 ns;
+    assert det = "11" severity failure;
+
+    wait;
+  end process;
+end behav;
-- 
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