From 7687582d7faebfb3e3c691ccd57df15106f09046 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 5 Aug 2019 08:09:47 +0200 Subject: Add testcase for #882 --- testsuite/synth/issue882/cpu.vhdl | 13 +++++++++++++ testsuite/synth/issue882/testsuite.sh | 10 ++++++++++ 2 files changed, 23 insertions(+) create mode 100644 testsuite/synth/issue882/cpu.vhdl create mode 100755 testsuite/synth/issue882/testsuite.sh (limited to 'testsuite/synth/issue882') diff --git a/testsuite/synth/issue882/cpu.vhdl b/testsuite/synth/issue882/cpu.vhdl new file mode 100644 index 000000000..28229eeb4 --- /dev/null +++ b/testsuite/synth/issue882/cpu.vhdl @@ -0,0 +1,13 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity cpu is + port ( + test : out std_logic_vector(7 downto 0) + ); +end cpu; + +architecture rtl of cpu is +begin + test <= "00000000"; +end rtl; diff --git a/testsuite/synth/issue882/testsuite.sh b/testsuite/synth/issue882/testsuite.sh new file mode 100755 index 000000000..c980ae914 --- /dev/null +++ b/testsuite/synth/issue882/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 +synth cpu.vhdl -e $t > syn_cpu.vhdl +analyze syn_cpu.vhdl +clean + +echo "Test successful" -- cgit v1.2.3