From 8a8c17f8e828f747cf06e975a9433d1e5a2d3a0f Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 30 Mar 2021 19:43:40 +0200
Subject: testsuite/gna: add a test for #1697

---
 testsuite/gna/issue1697/e1.vhdl      | 10 ++++++++++
 testsuite/gna/issue1697/e2.vhdl      | 11 +++++++++++
 testsuite/gna/issue1697/e3.vhdl      | 11 +++++++++++
 testsuite/gna/issue1697/testsuite.sh | 17 +++++++++++++++++
 4 files changed, 49 insertions(+)
 create mode 100644 testsuite/gna/issue1697/e1.vhdl
 create mode 100644 testsuite/gna/issue1697/e2.vhdl
 create mode 100644 testsuite/gna/issue1697/e3.vhdl
 create mode 100755 testsuite/gna/issue1697/testsuite.sh

(limited to 'testsuite/gna')

diff --git a/testsuite/gna/issue1697/e1.vhdl b/testsuite/gna/issue1697/e1.vhdl
new file mode 100644
index 000000000..bfa4aaaa5
--- /dev/null
+++ b/testsuite/gna/issue1697/e1.vhdl
@@ -0,0 +1,10 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity e is
+    port (i : in std_logic_vector(2 downto 0) := ('1','0'));
+end entity;
+
+architecture a of e is
+begin
+end architecture;
diff --git a/testsuite/gna/issue1697/e2.vhdl b/testsuite/gna/issue1697/e2.vhdl
new file mode 100644
index 000000000..c9d396654
--- /dev/null
+++ b/testsuite/gna/issue1697/e2.vhdl
@@ -0,0 +1,11 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity e is
+    port (o : out std_logic_vector(2 downto 0));
+end entity;
+
+architecture a of e is
+begin
+    o <= ('1','0');
+end architecture;
diff --git a/testsuite/gna/issue1697/e3.vhdl b/testsuite/gna/issue1697/e3.vhdl
new file mode 100644
index 000000000..1bf696f70
--- /dev/null
+++ b/testsuite/gna/issue1697/e3.vhdl
@@ -0,0 +1,11 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity e is
+    port (o : out std_logic_vector(4 downto 0));
+end entity;
+
+architecture a of e is
+begin
+    o <= ("01",'0');
+end architecture;
diff --git a/testsuite/gna/issue1697/testsuite.sh b/testsuite/gna/issue1697/testsuite.sh
new file mode 100755
index 000000000..497e68d29
--- /dev/null
+++ b/testsuite/gna/issue1697/testsuite.sh
@@ -0,0 +1,17 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze_failure e1.vhdl
+analyze_failure e2.vhdl
+
+clean
+
+export GHDL_STD_FLAGS=--std=93
+analyze_failure e1.vhdl
+analyze_failure e2.vhdl
+
+clean
+
+echo "Test successful"
-- 
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