From b3e340b0fbef7e7043f9626ee6d37a69f10edfe8 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 11 May 2019 07:44:18 +0200
Subject: Add testcases for #818

---
 testsuite/gna/issue818/tc15.vhdl | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 testsuite/gna/issue818/tc15.vhdl

(limited to 'testsuite/gna/issue818/tc15.vhdl')

diff --git a/testsuite/gna/issue818/tc15.vhdl b/testsuite/gna/issue818/tc15.vhdl
new file mode 100644
index 000000000..ca4131065
--- /dev/null
+++ b/testsuite/gna/issue818/tc15.vhdl
@@ -0,0 +1,17 @@
+entity tc15 is
+end;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tc15 is
+  signal clk : std_logic;
+  signal tg : std_logic;
+begin
+  process (clk) is
+  begin
+    if ?? (tg) and falling_edge(clk) then
+      null;
+    end if;
+  end process;
+end behav;
-- 
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