From 4ee9742dfe7e97ecd1bc4dd8fb323591ae57b118 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 4 Dec 2018 04:48:50 +0100 Subject: Add reproducer for #715 --- testsuite/gna/issue715/IntDemo.mem | 144 ++++++++++++++++++++++++++++++++++++ testsuite/gna/issue715/LRAM.vhdl | 78 +++++++++++++++++++ testsuite/gna/issue715/testsuite.sh | 11 +++ 3 files changed, 233 insertions(+) create mode 100644 testsuite/gna/issue715/IntDemo.mem create mode 100644 testsuite/gna/issue715/LRAM.vhdl create mode 100755 testsuite/gna/issue715/testsuite.sh (limited to 'testsuite/gna/issue715') diff --git a/testsuite/gna/issue715/IntDemo.mem b/testsuite/gna/issue715/IntDemo.mem new file mode 100644 index 000000000..6b19c3c30 --- /dev/null +++ b/testsuite/gna/issue715/IntDemo.mem @@ -0,0 +1,144 @@ +E7000053 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +4EE90008 +AFE00000 +A0E00004 +60008001 +40060004 +80000000 +40030008 +E0FFFFFB +60008001 +81E00004 +A1000000 +8FE00000 +4EE80008 +C700000F +4EE90008 +AFE00000 +A0E00004 +60008001 +40060004 +80000000 +40030007 +E8FFFFFB +60008001 +80000000 +81E00004 +A0100000 +8FE00000 +4EE80008 +C700000F +4EE90014 +AFE00000 +A0E00004 +A1E00008 +40000000 +A0E0000C +80E0000C +81E00004 +00180000 +90000000 +A0E00010 +80E00010 +F7FFFFD6 +80E0000C +40080001 +A0E0000C +80E00010 +E9FFFFF4 +8FE00000 +4EE80014 +C700000F +4EE9000C +A0E00000 +A1E00004 +ADE00008 +40D80004 +81000000 +41180001 +A1000000 +80D00004 +400901F4 +E900000A +40000000 +A0D00004 +80D00014 +40070010 +A0D00014 +4000007C +F7FFFFBC +60008000 +81D00014 +A1000000 +8DE00008 +81E00004 +80E00000 +4EE8000C +C7000010 +4D000008 +4E001000 +F7000000 +40F90074 +40020002 +6100E700 +00180000 +40090002 +41000004 +A0100000 +40000002 +A0D00014 +40000000 +A0D0000C +40000041 +F7FFFFA4 +400003E8 +A0D00000 +40002EA4 +A0D00008 +40D80008 +81000000 +41190001 +A1000000 +80D00008 +E9FFFFFA +40D80000 +81000000 +41190001 +A1000000 +80D00000 +E9FFFFF2 +80D00014 +40070200 +A0D00014 +60008000 +81D00014 +A1000000 +40D8000C +81000000 +41180001 +A1000000 +80D0000C +400B000A +20000000 +41000030 +00180000 +A0D00010 +80D00010 +F7FFFF82 +80D00010 +40090039 +E9000004 +4000000D +F7FFFF7D +4000000A +F7FFFF7B +E7FFFFD6 +40001000 +C7000000 diff --git a/testsuite/gna/issue715/LRAM.vhdl b/testsuite/gna/issue715/LRAM.vhdl new file mode 100644 index 000000000..e6ec79bb6 --- /dev/null +++ b/testsuite/gna/issue715/LRAM.vhdl @@ -0,0 +1,78 @@ +------------------------------------------------------------------------------- +-- +-- walter d. gallegos +-- www.waltergallegos.com +-- Programmable Logic Consulting +-- +-- Este archivo y documentacion son propiedad intelectual de Walter D. Gallegos +-- +------------------------------------------------------------------------------- + +LIBRARY IEEE; +USE IEEE.STD_LOGIC_1164.ALL, IEEE.NUMERIC_STD.ALL; +USE STD.TextIO.ALL; + +ENTITY LRAM IS +GENERIC ( size : INTEGER := 14; fName : STRING := "IntDemo.mem"; startAdr : INTEGER := 0); + PORT ( + CLOCK : IN STD_LOGIC; + WR : IN STD_LOGIC; + BEA : IN STD_LOGIC_VECTOR (3 DOWNTO 0); + DIA : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + DOA : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); + ADRA : IN STD_LOGIC_VECTOR (size-1 DOWNTO 0); + DOB : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); + ADRB : IN STD_LOGIC_VECTOR (size-1 DOWNTO 0) + ); +END LRAM; + +ARCHITECTURE WDG0 OF LRAM IS + + CONSTANT depth : INTEGER := (2**size)-1; + TYPE LocalRAMDesc IS ARRAY (0 TO depth) OF STD_LOGIC_VECTOR(31 DOWNTO 0); + + IMPURE FUNCTION Init (fName : STRING) RETURN LocalRAMDesc IS + FILE f : TEXT OPEN READ_MODE IS fName; + VARIABLE l : LINE; + VARIABLE b : STD_LOGIC_VECTOR(31 DOWNTO 0); + VARIABLE m : LocalRAMDesc := (OTHERS => (OTHERS => '0')); + BEGIN + FOR i IN startAdr TO depth LOOP + EXIT WHEN endfile(f); + IF (i = depth) THEN + REPORT "LRAM : Error memory full " SEVERITY FAILURE; + END IF; + readline(f, l); hread(l, b); + m(i) := STD_LOGIC_VECTOR(RESIZE(UNSIGNED(b), 32)); + END LOOP; + REPORT ("LRAM : loaded from " & fName & LF) SEVERITY NOTE; + RETURN m; + END FUNCTION; + + SIGNAL LocalRAM : LocalRAMDesc := Init(fName); + SIGNAL data, code : STD_LOGIC_VECTOR(31 DOWNTO 0); + + -- XILINX ATTRIBUTE + ATTRIBUTE ram_style : STRING; + ATTRIBUTE ram_style OF LocalRAM : SIGNAL IS "block"; + -- XILINX END ATTRIBUTE + +BEGIN + + CodeDataMemory : PROCESS(CLOCK) + BEGIN + IF rising_edge(CLOCK) THEN + FOR i IN DIA'RANGE LOOP + IF (BEA(i/8) AND WR)= '1' THEN + LocalRAM(TO_INTEGER(UNSIGNED(ADRA)))(i) <= DIA(i); + END IF; + END LOOP; + data <= LocalRAM(TO_INTEGER(UNSIGNED(ADRA))); + code <= LocalRAM(TO_INTEGER(UNSIGNED(ADRB))); + END IF; + END PROCESS CodeDataMemory; + + DOA <= data; + DOB <= code; + +END WDG0; diff --git a/testsuite/gna/issue715/testsuite.sh b/testsuite/gna/issue715/testsuite.sh new file mode 100755 index 000000000..36521da80 --- /dev/null +++ b/testsuite/gna/issue715/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +analyze LRAM.vhdl +elab_simulate LRAM --max-stack-alloc=0 + +clean + +echo "Test successful" -- cgit v1.2.3