From 66e31d6d8c4faab0aeadee87298f13a3b67adbfb Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 2 Apr 2016 07:40:37 +0200
Subject: Add testcase for issue50.

---
 testsuite/gna/issue50/vector.d/cmp_193.vhd | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 testsuite/gna/issue50/vector.d/cmp_193.vhd

(limited to 'testsuite/gna/issue50/vector.d/cmp_193.vhd')

diff --git a/testsuite/gna/issue50/vector.d/cmp_193.vhd b/testsuite/gna/issue50/vector.d/cmp_193.vhd
new file mode 100644
index 000000000..3eeeba859
--- /dev/null
+++ b/testsuite/gna/issue50/vector.d/cmp_193.vhd
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity cmp_193 is
+	port (
+		eq : out std_logic;
+		in0 : in  std_logic_vector(2 downto 0);
+		in1 : in  std_logic_vector(2 downto 0)
+	);
+end cmp_193;
+
+architecture augh of cmp_193 is
+
+	signal tmp : std_logic;
+
+begin
+
+	-- Compute the result
+	tmp <=
+		'0' when in0 /= in1 else
+		'1';
+
+	-- Set the outputs
+	eq <= tmp;
+
+end architecture;
-- 
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