From dfb71344973b5327611432e7b33429f73f0bd03c Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 5 Apr 2021 09:38:38 +0200 Subject: testsuite/gna: add more tests for #1708 --- testsuite/gna/issue1708/ex3.vhdl | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 testsuite/gna/issue1708/ex3.vhdl (limited to 'testsuite/gna/issue1708/ex3.vhdl') diff --git a/testsuite/gna/issue1708/ex3.vhdl b/testsuite/gna/issue1708/ex3.vhdl new file mode 100644 index 000000000..ea245aeb1 --- /dev/null +++ b/testsuite/gna/issue1708/ex3.vhdl @@ -0,0 +1,33 @@ +Library ieee; +use ieee.std_logic_1164.all; + +entity ex3 is +end entity; + + +architecture tb of ex3 is + + signal a,b : std_logic := '0'; + signal clk_sys : std_logic; + + default clock is rising_edge(clk_sys); +begin + + gen_clock_proc : process + begin + clk_sys <= '1'; + wait for 5 ns; + clk_sys <= '0'; + wait for 5 ns; + end process; + + test_proc : process + begin + a <= '1'; + wait for 50 ns; + std.env.finish; + end process; + + my_seq : assert never {a = '1'}[->3]; + +end architecture tb; -- cgit v1.2.3