From d154753aeaf8fe8106f5ddc42d9cc91feb4a8de0 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 10 Jan 2016 07:26:26 +0100
Subject: Add testcase for previous patch.

---
 testsuite/gna/issue14/repro1.vhdl | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'testsuite/gna/issue14/repro1.vhdl')

diff --git a/testsuite/gna/issue14/repro1.vhdl b/testsuite/gna/issue14/repro1.vhdl
index 468b6515c..6d37c1638 100644
--- a/testsuite/gna/issue14/repro1.vhdl
+++ b/testsuite/gna/issue14/repro1.vhdl
@@ -1,10 +1,10 @@
 library ieee;
 use ieee.std_logic_1164.all;
 
-entity repro is
-end repro;
+entity repro1 is
+end repro1;
 
-architecture behav of repro is
+architecture behav of repro1 is
 begin
   assert std_ulogic_vector'("LL") ?= "00";
 end behav;
-- 
cgit v1.2.3