From ec253b52f8b49815221c03cf55cc7a991d981c61 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 20 Jul 2019 10:21:29 +0200 Subject: synth: fix aggregate vectorize direction. --- src/synth/synth-expr.adb | 10 +++++----- src/synth/synth-values.ads | 1 + 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index c6e77effd..0f954eb0d 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -341,9 +341,9 @@ package body Synth.Expr is Arr := new Net_Array (1 .. Int32 (Val.Arr.Len)); -- Gather consecutive constant values. - Idx := 1; + Idx := Val.Arr.Len; Len := 0; - while Idx <= Val.Arr.Len loop + while Idx > 0 loop declare W_Zx, B_Zx : Uns32; W_Va, B_Va : Uns32; @@ -353,7 +353,7 @@ package body Synth.Expr is W_Zx := 0; W_Va := 0; Off := 0; - while Idx <= Val.Arr.Len + while Idx > 0 and then Off < 32 and then Is_Const (Val.Arr.V (Idx)) and then Is_Bit_Type (Etype) @@ -362,11 +362,11 @@ package body Synth.Expr is W_Zx := W_Zx or Shift_Left (B_Zx, Off); W_Va := W_Va or Shift_Left (B_Va, Off); Off := Off + 1; - Idx := Idx + 1; + Idx := Idx - 1; end loop; if Off = 0 then E := Get_Net (Val.Arr.V (Idx), Etype); - Idx := Idx + 1; + Idx := Idx - 1; else if W_Zx = 0 then E := Build_Const_UB32 diff --git a/src/synth/synth-values.ads b/src/synth/synth-values.ads index 0032538fe..9b23d834c 100644 --- a/src/synth/synth-values.ads +++ b/src/synth/synth-values.ads @@ -72,6 +72,7 @@ package Synth.Values is type Value_Type_Array is array (Iir_Index32 range <>) of Value_Acc; type Value_Array_Type (Len : Iir_Index32) is record + -- Values are from left to right. So V(1) is at index 'Left. V : Value_Type_Array (1 .. Len); end record; -- cgit v1.2.3