From cc951b301b52286677f36c390e077e9d3a3ea793 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 7 May 2019 07:49:52 +0200 Subject: vhdl-nodes_utils: renaming. --- src/vhdl/simulate/simul-elaboration.adb | 4 +- src/vhdl/vhdl-canon.adb | 26 +++++----- src/vhdl/vhdl-nodes_utils.adb | 22 ++++----- src/vhdl/vhdl-nodes_utils.ads | 19 ++++---- src/vhdl/vhdl-parse.adb | 85 ++++++++++++++++----------------- src/vhdl/vhdl-sem_specs.adb | 4 +- src/vhdl/vhdl-sem_utils.adb | 24 +++++----- src/vhdl/vhdl-std_package.adb | 6 +-- 8 files changed, 90 insertions(+), 100 deletions(-) (limited to 'src') diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb index 862d5d34c..0d006f3a5 100644 --- a/src/vhdl/simulate/simul-elaboration.adb +++ b/src/vhdl/simulate/simul-elaboration.adb @@ -1572,7 +1572,7 @@ package body Simul.Elaboration is Local := Get_Chain (Local); end loop; - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); Formal := Formal_Chain; for I in Assoc_List'Range loop if Assoc_List (I) = Null_Iir then @@ -1587,7 +1587,7 @@ package body Simul.Elaboration is end if; Set_Whole_Association_Flag (Assoc, True); Set_Formal (Assoc, Formal); - Sub_Chain_Append (First, Last, Assoc); + Chain_Append (First, Last, Assoc); Formal := Get_Chain (Formal); end loop; diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb index 99db770ae..85bc4190b 100644 --- a/src/vhdl/vhdl-canon.adb +++ b/src/vhdl/vhdl-canon.adb @@ -940,7 +940,7 @@ package body Vhdl.Canon is return Null_Iir; end if; - Sub_Chain_Init (N_Chain, Last); + Chain_Init (N_Chain, Last); Assoc_Chain := Association_Chain; -- Reorder the list of association in the interface order. @@ -975,7 +975,7 @@ package body Vhdl.Canon is -- Append ASSOC_EL in N_CHAIN. Set_Chain (Assoc_El, Null_Iir); - Sub_Chain_Append (N_Chain, Last, Assoc_El); + Chain_Append (N_Chain, Last, Assoc_El); case Get_Kind (Assoc_El) is when Iir_Kind_Association_Element_Open => @@ -1015,7 +1015,7 @@ package body Vhdl.Canon is Set_Formal (Assoc_El, Inter); end if; - Sub_Chain_Append (N_Chain, Last, Assoc_El); + Chain_Append (N_Chain, Last, Assoc_El); << Done >> null; Inter := Get_Chain (Inter); @@ -1087,7 +1087,7 @@ package body Vhdl.Canon is end if; El := Interface_Chain; - Sub_Chain_Init (Res, Last); + Chain_Init (Res, Last); while El /= Null_Iir loop Assoc := Create_Iir (Iir_Kind_Association_Element_Open); Set_Whole_Association_Flag (Assoc, True); @@ -1096,7 +1096,7 @@ package body Vhdl.Canon is Set_Formal (Assoc, El); end if; Location_Copy (Assoc, El); - Sub_Chain_Append (Res, Last, Assoc); + Chain_Append (Res, Last, Assoc); El := Get_Chain (El); end loop; return Res; @@ -1165,7 +1165,7 @@ package body Vhdl.Canon is N_Stmt : Iir; Res, Last : Iir; begin - Sub_Chain_Init (Res, Last); + Chain_Init (Res, Last); Stmt := First; while Stmt /= Null_Iir loop @@ -1303,7 +1303,7 @@ package body Vhdl.Canon is Error_Kind ("canon_sequential_stmts", Stmt); end case; - Sub_Chain_Append (Res, Last, N_Stmt); + Chain_Append (Res, Last, N_Stmt); Stmt := Get_Chain (Stmt); end loop; @@ -2410,7 +2410,7 @@ package body Vhdl.Canon is Error_Kind ("copy_association", Assoc); end case; - Sub_Chain_Append (First, Last, El); + Chain_Append (First, Last, El); Next_Association_Interface (Assoc, Inter); exit when Assoc = Null_Iir; exit when @@ -2437,7 +2437,7 @@ package body Vhdl.Canon is begin F_El := First_Chain; F_Inter := Inter_Chain; - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); Inter := Inter_Chain; while Inter /= Null_Iir loop -- Consistency check. @@ -2913,7 +2913,7 @@ package body Vhdl.Canon is Spec := El; end if; Set_Block_Specification (Res, Spec); - Sub_Chain_Append (First_Item, Last_Item, Res); + Chain_Append (First_Item, Last_Item, Res); end Create_Default_Block_Configuration; begin -- Note: the only allowed declarations are use clauses, which are not @@ -3005,7 +3005,7 @@ package body Vhdl.Canon is (Designator_List, Build_Simple_Name (El, El)); Set_Instantiation_List (Res, List_To_Flist (Designator_List)); - Sub_Chain_Append (First_Item, Last_Item, Res); + Chain_Append (First_Item, Last_Item, Res); end if; elsif Get_Kind (Comp_Conf) = Iir_Kind_Configuration_Specification @@ -3038,7 +3038,7 @@ package body Vhdl.Canon is Set_Binding_Indication (Res, Get_Binding_Indication (Comp_Conf)); Set_Is_Ref (Res, True); - Sub_Chain_Append (First_Item, Last_Item, Res); + Chain_Append (First_Item, Last_Item, Res); end if; end; when Iir_Kind_Block_Statement => @@ -3106,7 +3106,7 @@ package body Vhdl.Canon is Set_Base_Name (Blk_Spec, El); Set_Prefix (Blk_Spec, Build_Simple_Name (Bod, Res)); Set_Block_Specification (Res, Blk_Spec); - Sub_Chain_Append (First_Item, Last_Item, Res); + Chain_Append (First_Item, Last_Item, Res); end if; end if; end; diff --git a/src/vhdl/vhdl-nodes_utils.adb b/src/vhdl/vhdl-nodes_utils.adb index 236956a8c..a9c4f3c97 100644 --- a/src/vhdl/vhdl-nodes_utils.adb +++ b/src/vhdl/vhdl-nodes_utils.adb @@ -51,13 +51,13 @@ package body Vhdl.Nodes_Utils is end if; end Append_Chain; - procedure Sub_Chain_Init (First, Last : out Iir) is + procedure Chain_Init (First, Last : out Iir) is begin First := Null_Iir; Last := Null_Iir; - end Sub_Chain_Init; + end Chain_Init; - procedure Sub_Chain_Append (First, Last : in out Iir; El : Iir) is + procedure Chain_Append (First, Last : in out Iir; El : Iir) is begin pragma Assert (El /= Null_Iir); if First = Null_Iir then @@ -66,9 +66,9 @@ package body Vhdl.Nodes_Utils is Set_Chain (Last, El); end if; Last := El; - end Sub_Chain_Append; + end Chain_Append; - procedure Sub_Chain_Append_Chain (First, Last : in out Iir; + procedure Chain_Append_Chain (First, Last : in out Iir; First_Sub, Last_Sub : Iir) is begin pragma Assert (First_Sub /= Null_Iir); @@ -78,9 +78,9 @@ package body Vhdl.Nodes_Utils is Set_Chain (Last, First_Sub); end if; Last := Last_Sub; - end Sub_Chain_Append_Chain; + end Chain_Append_Chain; - procedure Sub_Chain_Append_Subchain (First, Last : in out Iir; + procedure Chain_Append_Subchain (First, Last : in out Iir; Sub : Iir) is N : Iir; @@ -98,19 +98,13 @@ package body Vhdl.Nodes_Utils is Last := N; N := Get_Chain (N); end loop; - end Sub_Chain_Append_Subchain; + end Chain_Append_Subchain; function Is_Chain_Length_One (Chain : Iir) return Boolean is begin return Chain /= Null_Iir and then Get_Chain (Chain) = Null_Iir; end Is_Chain_Length_One; - procedure Insert (Last : Iir; El : Iir) is - begin - Set_Chain (El, Get_Chain (Last)); - Set_Chain (Last, El); - end Insert; - procedure Insert_Incr (Last : in out Iir; El : Iir) is begin Set_Chain (El, Get_Chain (Last)); diff --git a/src/vhdl/vhdl-nodes_utils.ads b/src/vhdl/vhdl-nodes_utils.ads index ef71e504b..00769a9ee 100644 --- a/src/vhdl/vhdl-nodes_utils.ads +++ b/src/vhdl/vhdl-nodes_utils.ads @@ -55,28 +55,25 @@ package Vhdl.Nodes_Utils is -- the sub-chain. -- Set FIRST and LAST to Null_Iir. - procedure Sub_Chain_Init (First, Last : out Iir); - pragma Inline (Sub_Chain_Init); + procedure Chain_Init (First, Last : out Iir); + pragma Inline (Chain_Init); -- Append element EL to the sub-chain. - procedure Sub_Chain_Append (First, Last : in out Iir; El : Iir); - pragma Inline (Sub_Chain_Append); + procedure Chain_Append (First, Last : in out Iir; El : Iir); + pragma Inline (Chain_Append); -- Append chain to the sub-chain. FIRST_SUB and LAST_SUB must not be -- Null_Iir. - procedure Sub_Chain_Append_Chain (First, Last : in out Iir; - First_Sub, Last_Sub : Iir); - procedure Sub_Chain_Append_Subchain (First, Last : in out Iir; - Sub : Iir); + procedure Chain_Append_Chain (First, Last : in out Iir; + First_Sub, Last_Sub : Iir); + procedure Chain_Append_Subchain (First, Last : in out Iir; + Sub : Iir); -- Return TRUE iff CHAIN is of length one, ie CHAIN is not NULL_IIR -- and chain (CHAIN) is NULL_IIR. function Is_Chain_Length_One (Chain : Iir) return Boolean; pragma Inline (Is_Chain_Length_One); - -- Insert EL after LAST. - procedure Insert (Last : Iir; El : Iir); - -- Insert EL after LAST and set LAST to EL. procedure Insert_Incr (Last : in out Iir; El : Iir); end Vhdl.Nodes_Utils; diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb index 073fe65d3..a3ef79e76 100644 --- a/src/vhdl/vhdl-parse.adb +++ b/src/vhdl/vhdl-parse.adb @@ -2910,13 +2910,13 @@ package body Vhdl.Parse is Def := Create_Iir (Iir_Kind_Record_Resolution); Set_Location (Def, Loc); - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop El := Create_Iir (Iir_Kind_Record_Element_Resolution); Set_Location (El, Loc); Set_Identifier (El, Id); Set_Resolution_Indication (El, Parse_Resolution_Indication); - Sub_Chain_Append (First, Last, El); + Chain_Append (First, Last, El); exit when Current_Token /= Tok_Comma; -- Eat ',' @@ -3295,7 +3295,7 @@ package body Vhdl.Parse is Terminal : Iir; Subnature : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); -- Skip 'terminal'. Scan; @@ -3308,7 +3308,7 @@ package body Vhdl.Parse is Set_Parent (Terminal, Parent); - Sub_Chain_Append (First, Last, Terminal); + Chain_Append (First, Last, Terminal); exit when Current_Token /= Tok_Comma; -- Skip ','. @@ -3375,7 +3375,7 @@ package body Vhdl.Parse is Kind : Iir_Kind; Plus_Terminal : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); -- Eat 'quantity' Scan; @@ -3390,7 +3390,7 @@ package body Vhdl.Parse is Set_Parent (Object, Parent); - Sub_Chain_Append (First, Last, Object); + Chain_Append (First, Last, Object); exit when Current_Token /= Tok_Comma; @@ -3436,7 +3436,7 @@ package body Vhdl.Parse is -- Change declarations Object := First; - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); while Object /= Null_Iir loop New_Object := Create_Iir (Kind); Location_Copy (New_Object, Object); @@ -3445,7 +3445,7 @@ package body Vhdl.Parse is Set_Tolerance (New_Object, Tolerance); Set_Default_Value (New_Object, Default_Value); - Sub_Chain_Append (First, Last, New_Object); + Chain_Append (First, Last, New_Object); if Object /= First then Set_Plus_Terminal (New_Object, Null_Iir); @@ -3480,7 +3480,7 @@ package body Vhdl.Parse is loop Set_Parent (Object, Parent); - Sub_Chain_Append (First, Last, Object); + Chain_Append (First, Last, Object); exit when Current_Token /= Tok_Comma; -- Skip ','. Scan; @@ -3600,7 +3600,7 @@ package body Vhdl.Parse is Has_Mode : Boolean; Start_Loc : Location_Type; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); -- Object keyword was just scanned. Start_Loc := Get_Token_Location; @@ -3658,7 +3658,7 @@ package body Vhdl.Parse is Set_Start_Location (Object, Start_Loc); end if; - Sub_Chain_Append (First, Last, Object); + Chain_Append (First, Last, Object); exit when Current_Token /= Tok_Comma; @@ -4215,14 +4215,14 @@ package body Vhdl.Parse is -- Skip '('. Expect_Scan (Tok_Left_Paren); - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop - Sub_Chain_Append (First, Last, Parse_Entity_Class_Entry); + Chain_Append (First, Last, Parse_Entity_Class_Entry); if Current_Token = Tok_Box then El := Create_Iir (Iir_Kind_Entity_Class); Set_Location (El); Set_Entity_Class (El, Tok_Box); - Sub_Chain_Append (First, Last, El); + Chain_Append (First, Last, El); -- Skip '<>'. Scan; @@ -4665,7 +4665,7 @@ package body Vhdl.Parse is -- architecture_body and generate_statement) procedure Parse_Declarative_Part (Parent : Iir) is - First_Decl, Last_Decl : Iir; + Last_Decl : Iir; Decl : Iir; Package_Parent_Cache : Iir; @@ -4678,7 +4678,7 @@ package body Vhdl.Parse is end Package_Parent; begin Package_Parent_Cache := Null_Iir; - Sub_Chain_Init (First_Decl, Last_Decl); + Last_Decl := Null_Iir; loop Decl := Null_Iir; case Current_Token is @@ -4968,8 +4968,8 @@ package body Vhdl.Parse is end case; while Decl /= Null_Iir loop Set_Parent (Decl, Parent); - if First_Decl = Null_Iir then - First_Decl := Decl; + if Last_Decl = Null_Iir then + Set_Declaration_Chain (Parent, Decl); else Set_Chain (Last_Decl, Decl); end if; @@ -4977,7 +4977,6 @@ package body Vhdl.Parse is Decl := Get_Chain (Decl); end loop; end loop; - Set_Declaration_Chain (Parent, First_Decl); end Parse_Declarative_Part; -- precond : ENTITY @@ -5122,7 +5121,7 @@ package body Vhdl.Parse is Expr1 : Iir; Loc : Location_Type; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); Expr1 := Expr; Loc := First_Loc; loop @@ -5134,7 +5133,7 @@ package body Vhdl.Parse is end if; end if; - Sub_Chain_Append (First, Last, A_Choice); + Chain_Append (First, Last, A_Choice); if Current_Token /= Tok_Bar then Chain := First; @@ -5228,7 +5227,7 @@ package body Vhdl.Parse is end if; Res := Create_Iir (Iir_Kind_Aggregate); Set_Location (Res, Loc); - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop if Current_Token = Tok_Others then Assoc := Parse_A_Choice (Null_Iir, Loc); @@ -5263,7 +5262,7 @@ package body Vhdl.Parse is end case; end if; Set_Associated_Expr (Assoc, Expr); - Sub_Chain_Append_Subchain (First, Last, Assoc); + Chain_Append_Subchain (First, Last, Assoc); exit when Current_Token /= Tok_Comma; Loc := Get_Token_Location; @@ -5992,10 +5991,10 @@ package body Vhdl.Parse is -- Skip 'unaffected'. Scan; else - Sub_Chain_Init (Res, Last_We); + Chain_Init (Res, Last_We); loop We := Create_Iir (Iir_Kind_Waveform_Element); - Sub_Chain_Append (Res, Last_We, We); + Chain_Append (Res, Last_We, We); Set_Location (We); -- Note: NULL is handled as a null_literal. @@ -6215,7 +6214,7 @@ package body Vhdl.Parse is Parse_Options (Res); - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop Wf_Chain := Parse_Waveform; Expect (Tok_When, "'when' expected after waveform"); @@ -6226,7 +6225,7 @@ package body Vhdl.Parse is Parse_Choices (Null_Iir, When_Loc, Assoc); Set_Associated_Chain (Assoc, Wf_Chain); - Sub_Chain_Append_Subchain (First, Last, Assoc); + Chain_Append_Subchain (First, Last, Assoc); exit when Current_Token /= Tok_Comma; -- Skip ','. Scan; @@ -6798,7 +6797,7 @@ package body Vhdl.Parse is Error_Msg_Parse ("missing alternative in case statement"); end if; - Sub_Chain_Init (First_Assoc, Last_Assoc); + Chain_Init (First_Assoc, Last_Assoc); while Current_Token = Tok_When loop When_Loc := Get_Token_Location; @@ -6811,7 +6810,7 @@ package body Vhdl.Parse is Expect_Scan (Tok_Double_Arrow); Set_Associated_Chain (Assoc, Parse_Sequential_Statements (Stmt)); - Sub_Chain_Append_Subchain (First_Assoc, Last_Assoc, Assoc); + Chain_Append_Subchain (First_Assoc, Last_Assoc, Assoc); end loop; Set_Case_Statement_Alternative_Chain (Stmt, First_Assoc); @@ -7535,7 +7534,7 @@ package body Vhdl.Parse is Arrow_Loc : Location_Type; Comma_Loc : Location_Type; begin - Sub_Chain_Init (Res, Last); + Chain_Init (Res, Last); if Current_Token = Tok_Right_Paren then Error_Msg_Parse ("empty association list is not allowed"); @@ -7603,7 +7602,7 @@ package body Vhdl.Parse is Set_Arrow_Location (El, Arrow_Loc); end if; - Sub_Chain_Append (Res, Last, El); + Chain_Append (Res, Last, El); exit when Current_Token /= Tok_Comma; -- Eat ','. @@ -8751,12 +8750,12 @@ package body Vhdl.Parse is Library: Iir_Library_Clause; Start_Loc : Location_Type; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); Expect (Tok_Library); loop Library := Create_Iir (Iir_Kind_Library_Clause); Start_Loc := Get_Token_Location; - Sub_Chain_Append (First, Last, Library); + Chain_Append (First, Last, Library); -- Skip 'library' or ','. Scan; @@ -9155,10 +9154,10 @@ package body Vhdl.Parse is declare First, Last : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); while Current_Token = Tok_Use loop - Sub_Chain_Append_Subchain (First, Last, Parse_Use_Clause); + Chain_Append_Subchain (First, Last, Parse_Use_Clause); end loop; Set_Declaration_Chain (Res, First); end; @@ -9168,9 +9167,9 @@ package body Vhdl.Parse is declare First, Last : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); while Current_Token = Tok_For loop - Sub_Chain_Append (First, Last, Parse_Configuration_Item); + Chain_Append (First, Last, Parse_Configuration_Item); end loop; Set_Configuration_Item_Chain (Res, First); end; @@ -9290,13 +9289,13 @@ package body Vhdl.Parse is First, Last : Iir; El : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop case Current_Token is when Tok_Invalid => raise Internal_Error; when Tok_Use => - Sub_Chain_Append_Subchain (First, Last, Parse_Use_Clause); + Chain_Append_Subchain (First, Last, Parse_Use_Clause); when Tok_Attribute => El := Parse_Attribute; if El /= Null_Iir then @@ -9304,7 +9303,7 @@ package body Vhdl.Parse is Error_Msg_Parse ("attribute declaration not allowed here"); end if; - Sub_Chain_Append (First, Last, El); + Chain_Append (First, Last, El); end if; when Tok_Group => El := Parse_Group; @@ -9313,7 +9312,7 @@ package body Vhdl.Parse is Error_Msg_Parse ("group template declaration not allowed here"); end if; - Sub_Chain_Append (First, Last, El); + Chain_Append (First, Last, El); end if; when others => exit; @@ -9633,7 +9632,7 @@ package body Vhdl.Parse is First, Last : Iir; Els : Iir; begin - Sub_Chain_Init (First, Last); + Chain_Init (First, Last); loop case Current_Token is @@ -9666,7 +9665,7 @@ package body Vhdl.Parse is when others => exit; end case; - Sub_Chain_Append_Subchain (First, Last, Els); + Chain_Append_Subchain (First, Last, Els); end loop; Set_Context_Items (Unit, First); end Parse_Context_Clause; diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb index 5b63995bc..9329fff14 100644 --- a/src/vhdl/vhdl-sem_specs.adb +++ b/src/vhdl/vhdl-sem_specs.adb @@ -1674,7 +1674,7 @@ package body Vhdl.Sem_Specs is -- No error found yet. Error := False; - Sub_Chain_Init (Res, Last); + Chain_Init (Res, Last); Found := 0; Ent_El := Ent_Chain; while Ent_El /= Null_Iir loop @@ -1732,7 +1732,7 @@ package body Vhdl.Sem_Specs is Set_Collapse_Signal_Flag (Assoc, Can_Collapse_Signals (Assoc, Ent_El)); end if; - Sub_Chain_Append (Res, Last, Assoc); + Chain_Append (Res, Last, Assoc); Ent_El := Get_Chain (Ent_El); end loop; if Nodes_Utils.Get_Chain_Length (Comp_Chain) /= Found then diff --git a/src/vhdl/vhdl-sem_utils.adb b/src/vhdl/vhdl-sem_utils.adb index 65ffda3c0..24a45a9a4 100644 --- a/src/vhdl/vhdl-sem_utils.adb +++ b/src/vhdl/vhdl-sem_utils.adb @@ -151,7 +151,7 @@ package body Vhdl.Sem_Utils is Set_Identifier (Proc, Std_Names.Name_File_Open); Set_Visible_Flag (Proc, True); Set_Wait_State (Proc, False); - Sub_Chain_Init (First_Interface, Last_Interface); + Chain_Init (First_Interface, Last_Interface); case I is when 1 => Set_Implicit_Definition (Proc, Iir_Predefined_File_Open); @@ -167,7 +167,7 @@ package body Vhdl.Sem_Utils is Std_Package.File_Open_Status_Type_Definition); Set_Mode (Inter, Iir_Out_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); end case; -- File F : FT Inter := Create_Iir (Iir_Kind_Interface_File_Declaration); @@ -176,7 +176,7 @@ package body Vhdl.Sem_Utils is Set_Type (Inter, Type_Definition); Set_Mode (Inter, Iir_Inout_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); -- External_Name : in STRING Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration); Set_Location (Inter, Loc); @@ -184,7 +184,7 @@ package body Vhdl.Sem_Utils is Set_Type (Inter, Std_Package.String_Type_Definition); Set_Mode (Inter, Iir_In_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); -- Open_Kind : in File_Open_Kind := Read_Mode. Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration); Set_Location (Inter, Loc); @@ -195,7 +195,7 @@ package body Vhdl.Sem_Utils is (Inter, Build_Simple_Name (Std_Package.File_Open_Kind_Read_Mode, Loc)); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); Set_Interface_Declaration_Chain (Proc, First_Interface); Compute_Subprogram_Hash (Proc); -- Add it to the list. @@ -235,14 +235,14 @@ package body Vhdl.Sem_Utils is Set_Parent (Proc, Get_Parent (Decl)); Set_Visible_Flag (Proc, True); Set_Wait_State (Proc, False); - Sub_Chain_Init (First_Interface, Last_Interface); + Chain_Init (First_Interface, Last_Interface); Inter := Create_Iir (File_Interface_Kind); Set_Identifier (Inter, Std_Names.Name_F); Set_Location (Inter, Loc); Set_Type (Inter, Type_Definition); Set_Mode (Inter, Iir_In_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); Inter := Create_Iir (Iir_Kind_Interface_Variable_Declaration); Set_Identifier (Inter, Std_Names.Name_Value); Set_Location (Inter, Loc); @@ -250,7 +250,7 @@ package body Vhdl.Sem_Utils is Set_Type (Inter, Type_Mark_Type); Set_Mode (Inter, Iir_Out_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); if Get_Kind (Type_Mark_Type) in Iir_Kinds_Array_Type_Definition and then Get_Constraint_State (Type_Mark_Type) /= Fully_Constrained then @@ -260,7 +260,7 @@ package body Vhdl.Sem_Utils is Set_Type (Inter, Std_Package.Natural_Subtype_Definition); Set_Mode (Inter, Iir_Out_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); Set_Implicit_Definition (Proc, Iir_Predefined_Read_Length); else Set_Implicit_Definition (Proc, Iir_Predefined_Read); @@ -277,7 +277,7 @@ package body Vhdl.Sem_Utils is Set_Parent (Proc, Get_Parent (Decl)); Set_Visible_Flag (Proc, True); Set_Wait_State (Proc, False); - Sub_Chain_Init (First_Interface, Last_Interface); + Chain_Init (First_Interface, Last_Interface); Inter := Create_Iir (File_Interface_Kind); Set_Identifier (Inter, Std_Names.Name_F); Set_Location (Inter, Loc); @@ -286,7 +286,7 @@ package body Vhdl.Sem_Utils is Set_Name_Staticness (Inter, Locally); Set_Expr_Staticness (Inter, None); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); Inter := Create_Iir (Iir_Kind_Interface_Constant_Declaration); Set_Identifier (Inter, Std_Names.Name_Value); Set_Location (Inter, Loc); @@ -294,7 +294,7 @@ package body Vhdl.Sem_Utils is Set_Type (Inter, Type_Mark_Type); Set_Mode (Inter, Iir_In_Mode); Set_Visible_Flag (Inter, True); - Sub_Chain_Append (First_Interface, Last_Interface, Inter); + Chain_Append (First_Interface, Last_Interface, Inter); Set_Implicit_Definition (Proc, Iir_Predefined_Write); Set_Interface_Declaration_Chain (Proc, First_Interface); Compute_Subprogram_Hash (Proc); diff --git a/src/vhdl/vhdl-std_package.adb b/src/vhdl/vhdl-std_package.adb index 3d7a78c85..d112b0daf 100644 --- a/src/vhdl/vhdl-std_package.adb +++ b/src/vhdl/vhdl-std_package.adb @@ -840,7 +840,7 @@ package body Vhdl.Std_Package is Set_Expr_Staticness (Unit, Time_Staticness); Set_Name_Staticness (Unit, Locally); - Sub_Chain_Append (First_Unit, Last_Unit, Unit); + Chain_Append (First_Unit, Last_Unit, Unit); end Create_Unit; Constraint : Iir_Range_Expression; @@ -860,7 +860,7 @@ package body Vhdl.Std_Package is not Flags.Flag_Whole_Analyze); Set_End_Has_Reserved_Id (Time_Type_Definition, True); - Sub_Chain_Init (First_Unit, Last_Unit); + Chain_Init (First_Unit, Last_Unit); Time_Fs_Unit := Create_Std_Decl (Iir_Kind_Unit_Declaration); Set_Std_Identifier (Time_Fs_Unit, Name_Fs); @@ -869,7 +869,7 @@ package body Vhdl.Std_Package is Set_Name_Staticness (Time_Fs_Unit, Locally); Set_Physical_Literal (Time_Fs_Unit, Create_Std_Phys_Lit (1, Time_Fs_Unit)); - Sub_Chain_Append (First_Unit, Last_Unit, Time_Fs_Unit); + Chain_Append (First_Unit, Last_Unit, Time_Fs_Unit); Create_Unit (Time_Ps_Unit, 1000, Time_Fs_Unit, Name_Ps); Create_Unit (Time_Ns_Unit, 1000, Time_Ps_Unit, Name_Ns); -- cgit v1.2.3