From a67ead12564c47068e02fe702d07ad1ae2b832c9 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sun, 11 Sep 2022 08:01:58 +0200 Subject: synth: initialize out parameters of procedures --- src/synth/synth-vhdl_stmts.adb | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 6007fd975..d0234b814 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -2001,8 +2001,15 @@ package body Synth.Vhdl_Stmts is (Subprg_Inst, Val, Inter_Typ, True, Assoc); Val := Unshare (Val, Instance_Pool); else - -- Use default value ? - null; + -- Use default value + -- FIXME: also for wires ? + if Val.Val.Kind = Value_Memory then + if Is_Bounded_Type (Inter_Typ) then + Write_Value_Default (Val.Val.Mem, Inter_Typ); + else + Write_Value_Default (Val.Val.Mem, Val.Typ); + end if; + end if; end if; Val.Typ := Unshare (Val.Typ, Instance_Pool); when Iir_Kind_Interface_Signal_Declaration => -- cgit v1.2.3