From 94dd08effd3907a945e92d07670607ac52d96d39 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sun, 5 Jun 2022 11:07:43 +0200 Subject: vhdl-ieee-numeric: recognize is_x, to_x01, to_ux01 and to_x01z --- src/vhdl/vhdl-ieee-numeric.adb | 46 ++++++++++++++++++++++++++++++++++-------- src/vhdl/vhdl-nodes.ads | 12 +++++++++++ 2 files changed, 50 insertions(+), 8 deletions(-) (limited to 'src') diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index 96432df56..73f3010ac 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -582,6 +582,26 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Find_Rightmost_Sgn, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Find_Rightmost_Uns); + To_01_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_To_01_Uns); + + To_X01_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_To_X01_Sgn, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_To_X01_Uns); + + To_X01z_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Sgn, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Uns); + + To_Ux01_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_To_UX01_Sgn, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_To_UX01_Uns); + + Is_X_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Is_X_Sgn, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Is_X_Uns); + Error : exception; procedure Extract_Declarations (Pkg_Decl : Iir_Package_Declaration; @@ -804,18 +824,20 @@ package body Vhdl.Ieee.Numeric is raise Error; end if; - case Arg1_Sign is - when Type_Unsigned => - Predefined := Iir_Predefined_Ieee_Numeric_Std_To_01_Uns; - when Type_Signed => - Predefined := Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn; - when others => - raise Error; - end case; + Predefined := To_01_Patterns (Arg1_Sign); Set_Implicit_Definition (Decl, Predefined); end Handle_To_01; + procedure Handle_To_X01 (Pats : Shift_Pattern_Type) is + begin + if Arg1_Kind /= Arg_Vect then + raise Error; + end if; + + Set_Implicit_Definition (Decl, Pats (Arg1_Sign)); + end Handle_To_X01; + procedure Handle_Shift (Pats : Shift_Pattern_Type; Sh_Sign : Sign_Kind) is Res : Iir_Predefined_Functions; @@ -1037,6 +1059,14 @@ package body Vhdl.Ieee.Numeric is Handle_Unary (Red_Xor_Patterns); when Name_Xnor => Handle_Unary (Red_Xnor_Patterns); + when Name_To_X01 => + Handle_To_X01 (To_X01_Patterns); + when Name_To_X01Z => + Handle_To_X01 (To_X01z_Patterns); + when Name_To_UX01 => + Handle_To_X01 (To_Ux01_Patterns); + when Name_Is_X => + Handle_To_X01 (Is_X_Patterns); when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index fc36dd35e..f4bc84dd7 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5956,6 +5956,18 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_To_01_Uns, Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn, + Iir_Predefined_Ieee_Numeric_Std_To_X01_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_X01_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_To_UX01_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_UX01_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_Is_X_Uns, + Iir_Predefined_Ieee_Numeric_Std_Is_X_Sgn, + -- numeric_bit -- To_Integer, To_Unsigned, to_Signed -- cgit v1.2.3