From 8e58f10787a209cadb18699b47fc9b127121440a Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 4 Feb 2021 08:14:34 +0100 Subject: synth: handle to_stdlogicvector. For #1628 --- src/synth/synth-static_oper.adb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index bcaadbb0c..8190b5ba8 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -845,7 +845,8 @@ package body Synth.Static_Oper is end; when Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Nat_Uns - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int => + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int + | Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv => return Eval_To_Vector (Uns64 (Read_Discrete (Param1)), Read_Discrete (Param2), Res_Typ); -- cgit v1.2.3