From 6e63d78e54e243b864bacf376c481760362b0825 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 18 Dec 2017 20:04:39 +0100 Subject: simul: minor refactoring. --- src/vhdl/simulate/simul-elaboration.adb | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb index c1bc7ff88..4396bb9cd 100644 --- a/src/vhdl/simulate/simul-elaboration.adb +++ b/src/vhdl/simulate/simul-elaboration.adb @@ -1246,13 +1246,11 @@ package body Simul.Elaboration is Assoc : Iir_Association_Element_By_Expression; Inter : Iir) is - Formal : Iir; - Actual : Iir; + Formal : constant Iir := Get_Association_Formal (Assoc, Inter); + Actual : constant Iir := Get_Actual (Assoc); Local_Expr : Iir_Value_Literal_Acc; Formal_Expr : Iir_Value_Literal_Acc; begin - Formal := Get_Association_Formal (Assoc, Inter); - Actual := Get_Actual (Assoc); Formal_Expr := Execute_Name (Formal_Instance, Formal, True); Formal_Expr := Unshare_Bounds (Formal_Expr, Global_Pool'Access); if Actual_Expr = null then -- cgit v1.2.3