From 9113c965378a69447386d57d6d8a9f4caf7d1581 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 25 Jul 2022 05:17:10 +0200 Subject: simul: gather terminals --- src/vhdl/vhdl-annotations.adb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/vhdl') diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 7a2487278..fb8603c56 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -765,10 +765,11 @@ package body Vhdl.Annotations is when Iir_Kind_Terminal_Declaration => Add_Terminal_Info (Block_Info, Decl); - when Iir_Kinds_Branch_Quantity_Declaration - | Iir_Kind_Free_Quantity_Declaration => + when Iir_Kind_Free_Quantity_Declaration => Annotate_Declaration_Type (Block_Info, Decl); Add_Quantity_Info (Block_Info, Decl); + when Iir_Kinds_Branch_Quantity_Declaration => + Add_Quantity_Info (Block_Info, Decl); when Iir_Kind_Type_Declaration | Iir_Kind_Anonymous_Type_Declaration => @@ -848,7 +849,6 @@ package body Vhdl.Annotations is when Iir_Kind_Nature_Declaration => null; - when Iir_Kind_Psl_Default_Clock => null; -- cgit v1.2.3