From 768c62a76be455d299a065e5516fb8b7a917c019 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 12 Jan 2023 18:24:24 +0100 Subject: simul: handle PSL aborts --- src/vhdl/translate/trans-chap9.adb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/vhdl') diff --git a/src/vhdl/translate/trans-chap9.adb b/src/vhdl/translate/trans-chap9.adb index 469dc6c20..7dcec16a3 100644 --- a/src/vhdl/translate/trans-chap9.adb +++ b/src/vhdl/translate/trans-chap9.adb @@ -389,9 +389,13 @@ package body Trans.Chap9 is begin Start_Declare_Stmt; New_Var_Decl (Var_I, Wki_I, O_Storage_Local, Ghdl_Index_Type); + + -- Set true to the first state. New_Assign_Stmt (New_Indexed_Element (Get_Var (Info.Psl_Vect_Var), New_Lit (Ghdl_Index_0)), New_Lit (Std_Boolean_True_Node)); + + -- Set flase to the other states. New_Assign_Stmt (New_Obj (Var_I), New_Lit (Ghdl_Index_1)); Start_Loop_Stmt (Label); Gen_Exit_When -- cgit v1.2.3