From a52af2f98e34648a2a9b056b11da518a60a6c6cd Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 26 Dec 2019 18:05:51 +0100
Subject: vhdl: improve support of AMS-vhdl (array and record natures, source
 quantities)

---
 src/vhdl/simulate/simul-elaboration.adb | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/vhdl/simulate')

diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb
index f165662c2..b65614a6b 100644
--- a/src/vhdl/simulate/simul-elaboration.adb
+++ b/src/vhdl/simulate/simul-elaboration.adb
@@ -803,6 +803,8 @@ package body Simul.Elaboration is
                   Kind := Quantity_Through;
                when Iir_Kind_Free_Quantity_Declaration =>
                   Kind := Quantity_Free;
+               when Iir_Kinds_Source_Quantity_Declaration =>
+                  raise Internal_Error; --  TODO.
             end case;
             Res := Create_Quantity_Value
               (Create_Scalar_Quantity (Kind, Decl, Block));
-- 
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