From d1bcab86c7bb8e6d115a9fb5e9da08cd789f34d1 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 5 Sep 2019 06:40:01 +0200 Subject: synth-disp_vhdl: handle arrays in disp_out_converter. --- src/synth/synth-disp_vhdl.adb | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'src/synth') diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb index a7829953a..f678c367f 100644 --- a/src/synth/synth-disp_vhdl.adb +++ b/src/synth/synth-disp_vhdl.adb @@ -266,7 +266,25 @@ package body Synth.Disp_Vhdl is Disp_Out_Rhs (Mname, Off, W, Full); Put_Line (");"); else - Error_Kind ("disp_out_converter(arr)", Ptype); + declare + Bnd : Bound_Type renames Typ.Abounds.D (1); + El_Type : constant Node := Get_Element_Subtype (Ptype); + El_W : constant Width := Get_Type_Width (Typ.Arr_El); + Idx : Int32; + begin + for I in 0 .. Bnd.Len - 1 loop + case Bnd.Dir is + when Iir_To => + Idx := Bnd.Left + Int32 (I); + when Iir_Downto => + Idx := Bnd.Left - Int32 (I); + end case; + Disp_Out_Converter + (Mname, + Pfx & " (" & Int32'Image (Idx) & ")", + Off + I * El_W, El_Type, Typ.Arr_El, False); + end loop; + end; end if; when Iir_Kind_Record_Type_Definition => declare -- cgit v1.2.3