From b513a6170db4fe14eb6e885e859445d763633266 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 12 Oct 2019 07:07:42 +0200 Subject: vhdl: recognize std_logic_unsigned.conv_integer. Handle more operators in synth. --- src/synth/synth-oper.adb | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/synth') diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index d6574667b..8f85a8817 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -513,7 +513,9 @@ package body Synth.Oper is | Iir_Predefined_Ieee_Std_Logic_Unsigned_Sub_Slv_Int => -- "-" (Unsigned, Natural) return Synth_Dyadic_Uns_Nat (Id_Sub); - when Iir_Predefined_Ieee_Numeric_Std_Sub_Uns_Uns => + when Iir_Predefined_Ieee_Numeric_Std_Sub_Uns_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Sub_Slv_Slv + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Sub_Slv_Sl => -- "-" (Unsigned, Unsigned) return Synth_Dyadic_Uns (Id_Sub, True); when Iir_Predefined_Ieee_Numeric_Std_Sub_Sgn_Int @@ -1078,7 +1080,8 @@ package body Synth.Oper is end if; end; when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns => + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer => -- UNSIGNED to Natural. declare Int_Type : constant Type_Acc := -- cgit v1.2.3