From b07491996ae541300a1e2c82a5ccfd9414023bc6 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 19 Jun 2020 07:29:21 +0200 Subject: synth: handle std_logic_signed.conv_integer. For ghdl/ghdl-yosys-plugin#126 --- src/synth/synth-oper.adb | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'src/synth') diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index 42c17af9b..e63baebe8 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1615,21 +1615,22 @@ package body Synth.Oper is return Create_Value_Net (Get_Net (Ctxt, L), Res_Typ); when Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Nat_Uns - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int => + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int => return Synth_Conv_Vector (False); when Iir_Predefined_Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Int => return Synth_Conv_Vector (True); when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log - | Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer => + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log + | Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer => -- UNSIGNED to Natural. return Create_Value_Net (Synth_Uresize (Ctxt, Get_Net (Ctxt, L), Res_Typ.W, Expr), Res_Typ); when Iir_Predefined_Ieee_Numeric_Std_Toint_Sgn_Int - | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn => + | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn + | Iir_Predefined_Ieee_Std_Logic_Signed_Conv_Integer => -- SIGNED to Integer. return Create_Value_Net (Synth_Sresize (Ctxt, L, Res_Typ.W, Expr), Res_Typ); -- cgit v1.2.3