From a05c5813bee6c063dc196471e66816fbca5dc50e Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 8 May 2019 07:33:04 +0200
Subject: vhdl: extract vhdl.errors from errorout.

---
 src/synth/synth-context.adb | 2 +-
 src/synth/synth-decls.adb   | 2 +-
 src/synth/synth-expr.adb    | 2 +-
 src/synth/synth-stmts.adb   | 2 +-
 src/synth/synth-types.adb   | 2 +-
 src/synth/synthesis.adb     | 1 +
 6 files changed, 6 insertions(+), 5 deletions(-)

(limited to 'src/synth')

diff --git a/src/synth/synth-context.adb b/src/synth/synth-context.adb
index a84f56e38..135b40d7c 100644
--- a/src/synth/synth-context.adb
+++ b/src/synth/synth-context.adb
@@ -22,7 +22,7 @@ with Ada.Unchecked_Deallocation;
 
 with Types; use Types;
 with Grt.Types; use Grt.Types;
-with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 with Vhdl.Utils;
 
 with Vhdl.Std_Package;
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb
index 23e34b957..576a90918 100644
--- a/src/synth/synth-decls.adb
+++ b/src/synth/synth-decls.adb
@@ -21,7 +21,7 @@
 with Types; use Types;
 with Netlists; use Netlists;
 with Netlists.Builders; use Netlists.Builders;
-with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 with Synth.Context; use Synth.Context;
 with Synth.Types; use Synth.Types;
 with Synth.Environment; use Synth.Environment;
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 7a682dbff..0384aa785 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -23,7 +23,7 @@ with Ada.Unchecked_Deallocation;
 with Std_Names;
 with Vhdl.Ieee.Std_Logic_1164;
 with Vhdl.Std_Package;
-with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 with Simul.Execution;
 with Grt.Types; use Grt.Types;
 
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index 613bcdbdd..99021984a 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -23,7 +23,7 @@ with Ada.Unchecked_Deallocation;
 with Types; use Types;
 with Grt.Algos;
 with Areapools;
-with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 
 with Vhdl.Sem_Expr;
 with Vhdl.Utils; use Vhdl.Utils;
diff --git a/src/synth/synth-types.adb b/src/synth/synth-types.adb
index 19e9677ec..cc89eefe3 100644
--- a/src/synth/synth-types.adb
+++ b/src/synth/synth-types.adb
@@ -25,7 +25,7 @@ with Vhdl.Utils; use Vhdl.Utils;
 
 with Simul.Environments; use Simul.Environments;
 with Simul.Execution;
-with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 
 package body Synth.Types is
    function Is_Bit_Type (Atype : Iir) return Boolean is
diff --git a/src/synth/synthesis.adb b/src/synth/synthesis.adb
index 770fb52c9..4a346b0a9 100644
--- a/src/synth/synthesis.adb
+++ b/src/synth/synthesis.adb
@@ -39,6 +39,7 @@ with Synth.Environment.Debug;
 pragma Unreferenced (Synth.Environment.Debug);
 
 with Errorout; use Errorout;
+with Vhdl.Errors; use Vhdl.Errors;
 
 package body Synthesis is
    function Mode_To_Port_Kind (Mode : Iir_Mode) return Port_Kind is
-- 
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