From c428e11471d4323632305d0b8a665262af6a9a60 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 1 Jul 2019 06:27:18 +0200 Subject: netlists disp_vhdl: rewrite uextend. --- src/synth/netlists-disp_vhdl.adb | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/synth/netlists-disp_vhdl.adb') diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 0f7418167..701d1f782 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -524,12 +524,14 @@ package body Netlists.Disp_Vhdl is end; when Id_Uextend => declare - W : constant Width := Get_Width (Get_Output (Inst, 0)); + Ow : constant Width := Get_Width (Get_Output (Inst, 0)); + Iw : constant Width := Get_Width (Get_Input_Net (Inst, 0)); begin - Disp_Template (" \o0 <= std_logic_vector (resize (\ui0, ", - Inst); - Put_Uns32 (W); - Put_Line ("));"); + pragma Assert (Iw > 0); + pragma Assert (Ow > Iw); + Disp_Template (" \o0 <= """, Inst); + Put ((1 .. Natural (Ow - Iw) => '0')); + Disp_Template (""" & \i0; -- uext" & NL, Inst); end; when others => Disp_Instance_Gate (Inst); -- cgit v1.2.3