From 5c18960e811ace9ad7418e452c4d5c802ad30e2f Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 8 Feb 2023 16:51:19 +0100
Subject: simul: improve support of PSL endpoints

---
 src/simul/simul-vhdl_simul.adb | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

(limited to 'src/simul')

diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index d93d13869..e898031bf 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -2245,14 +2245,7 @@ package body Simul.Vhdl_Simul is
             --  TODO
             null;
          when Iir_Kind_Psl_Endpoint_Declaration =>
-            declare
-               Val : Valtyp;
-            begin
-               Val := Create_Value_Memory (Bit_Type, Global_Pool'Access);
-               Write_Discrete (Val, 0);
-               --  TODO: create the object/signal during elaboration
-               Create_Object (Proc.Instance, Proc.Proc, Val);
-            end;
+            null;
          when others =>
             null;
       end case;
-- 
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