From 919cc95cce51bbe0fb1fb0778ed63fffd184977b Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 31 Jan 2023 18:57:14 +0100 Subject: ghdlsimul: extract simul-main from simul-vhdl_simul --- src/simul/simul-vhdl_debug.adb | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/simul/simul-vhdl_debug.adb') diff --git a/src/simul/simul-vhdl_debug.adb b/src/simul/simul-vhdl_debug.adb index 6ae5976ff..0d94be076 100644 --- a/src/simul/simul-vhdl_debug.adb +++ b/src/simul/simul-vhdl_debug.adb @@ -38,6 +38,7 @@ with Elab.Vhdl_Values; use Elab.Vhdl_Values; with Elab.Vhdl_Values.Debug; use Elab.Vhdl_Values.Debug; with Simul.Vhdl_Elab; use Simul.Vhdl_Elab; with Simul.Vhdl_Simul; +with Simul.Main; with Grt.Types; use Grt.Types; with Grt.Vhdl_Types; use Grt.Vhdl_Types; @@ -788,14 +789,14 @@ package body Simul.Vhdl_Debug is if P <= Line'Last then L := Get_Word (Line, P); if Line (P .. L) = "-s" then - Simul.Vhdl_Simul.Break_Step := True; + Simul.Main.Break_Step := True; else Delta_Time := Grt.Options.Parse_Time (Line (P .. L)); if Delta_Time = -1 then -- Error, ignore command. return; end if; - Simul.Vhdl_Simul.Break_Time := Current_Time + Delta_Time; + Simul.Main.Break_Time := Current_Time + Delta_Time; Grt.Processes.Next_Time := Current_Time + Delta_Time; end if; end if; -- cgit v1.2.3