From d52693df5bc7480c3917b7248f8602f2942aeab7 Mon Sep 17 00:00:00 2001 From: Xiretza Date: Wed, 10 Feb 2021 19:17:23 +0100 Subject: pyGHDL: format using black --- pyGHDL/libghdl/vhdl/sem_lib.py | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) (limited to 'pyGHDL/libghdl/vhdl/sem_lib.py') diff --git a/pyGHDL/libghdl/vhdl/sem_lib.py b/pyGHDL/libghdl/vhdl/sem_lib.py index 87a07f480..3a63724e9 100644 --- a/pyGHDL/libghdl/vhdl/sem_lib.py +++ b/pyGHDL/libghdl/vhdl/sem_lib.py @@ -40,31 +40,31 @@ from pyGHDL.libghdl._types import SourceFileEntry @export def Load_File(File: SourceFileEntry): - """ - Start to analyse a file (i.e. load and parse it). + """ + Start to analyse a file (i.e. load and parse it). - :param File: File to analyse. - :return: Return :attr:`~pyGHDL.libghdl.vhdl.nodes.Null_Iir` in case of parse error. Type: ``Iir_Design_File`` - """ - return libghdl.vhdl__sem_lib__load_file(File) + :param File: File to analyse. + :return: Return :attr:`~pyGHDL.libghdl.vhdl.nodes.Null_Iir` in case of parse error. Type: ``Iir_Design_File`` + """ + return libghdl.vhdl__sem_lib__load_file(File) @export def Finish_Compilation(Unit, Main: bool = False) -> None: - """ - Analyze :obj:`Unit`. + """ + Analyze :obj:`Unit`. - :param Unit: Design unit to analyze. - :param Main: Is main unit. - """ - libghdl.vhdl__sem_lib__finish_compilation(Unit, Main) + :param Unit: Design unit to analyze. + :param Main: Is main unit. + """ + libghdl.vhdl__sem_lib__finish_compilation(Unit, Main) @export def Free_Dependence_List(Design) -> None: - """ - Free the dependence list of :obj:`Design`. + """ + Free the dependence list of :obj:`Design`. - :param Design: Design unit to free dependencies for. - """ - libghdl.vhdl__sem_lib__free_dependence_list(Design) + :param Design: Design unit to free dependencies for. + """ + libghdl.vhdl__sem_lib__free_dependence_list(Design) -- cgit v1.2.3