From 3f0308a5f807269aa5691fa1c704c0e9147d45f1 Mon Sep 17 00:00:00 2001
From: Patrick Lehmann <Patrick.Lehmann@plc2.de>
Date: Mon, 16 Aug 2021 23:47:04 +0200
Subject: Handle contexts.

---
 pyGHDL/dom/Concurrent.py             |  1 -
 pyGHDL/dom/DesignUnit.py             | 95 ++++++++++++++++++++++++++----------
 pyGHDL/dom/NonStandard.py            | 40 ++++++++++++---
 pyGHDL/dom/Sequential.py             |  1 -
 pyGHDL/dom/_Translate.py             |  2 +-
 pyGHDL/dom/formatting/prettyprint.py |  8 +--
 6 files changed, 108 insertions(+), 39 deletions(-)

(limited to 'pyGHDL/dom')

diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py
index 953d4d6e3..f4ded4e80 100644
--- a/pyGHDL/dom/Concurrent.py
+++ b/pyGHDL/dom/Concurrent.py
@@ -487,7 +487,6 @@ class CaseGenerateStatement(VHDLModel_CaseGenerateStatement, DOMMixin):
         while alternative != nodes.Null_Iir:
             choiceKind = GetIirKindOfNode(alternative)
             sameAlternative = nodes.Get_Same_Alternative_Flag(alternative)
-            print("sameAlternative: ", sameAlternative)
 
             if choiceKind in (
                 nodes.Iir_Kind.Choice_By_Name,
diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py
index e8dfccbd7..c905a439d 100644
--- a/pyGHDL/dom/DesignUnit.py
+++ b/pyGHDL/dom/DesignUnit.py
@@ -41,9 +41,11 @@ This module contains all DOM classes for VHDL's design units (:class:`context <E
 """
 from typing import Iterable
 
+from pyGHDL.libghdl import utils
 from pydecor import export
 
 from pyVHDLModel.SyntaxModel import (
+    LibraryClause as VHDLModel_LibraryClause,
     UseClause as VHDLModel_UseClause,
     Entity as VHDLModel_Entity,
     Architecture as VHDLModel_Architecture,
@@ -58,11 +60,12 @@ from pyVHDLModel.SyntaxModel import (
     EntityOrSymbol,
     Name,
     ConcurrentStatement,
+    Context,
 )
 
 from pyGHDL.libghdl._types import Iir
 from pyGHDL.libghdl.vhdl import nodes
-from pyGHDL.dom import DOMMixin
+from pyGHDL.dom import DOMMixin, Position, DOMException
 from pyGHDL.dom._Utils import GetNameOfNode
 from pyGHDL.dom._Translate import (
     GetGenericsFromChainedNodes,
@@ -77,20 +80,28 @@ from pyGHDL.dom.Symbol import EntitySymbol
 __all__ = []
 
 
+@export
+class LibraryClause(VHDLModel_LibraryClause, DOMMixin):
+    def __init__(self, node: Iir, names: Iterable[Name]):
+        super().__init__(names)
+        DOMMixin.__init__(self, node)
+
+
 @export
 class UseClause(VHDLModel_UseClause, DOMMixin):
-    def __init__(self, node: Iir, name: Name):
-        super().__init__(name)
+    def __init__(self, node: Iir, names: Iterable[Name]):
+        super().__init__(names)
         DOMMixin.__init__(self, node)
 
     @classmethod
     def parse(cls, useNode: Iir):
         from pyGHDL.dom._Translate import GetNameFromNode
 
-        selectedName = nodes.Get_Selected_Name(useNode)
-        name = GetNameFromNode(selectedName)
+        uses = [GetNameFromNode(nodes.Get_Selected_Name(useNode))]
+        for use in utils.chain_iter(nodes.Get_Use_Clause_Chain(useNode)):
+            uses.append(GetNameFromNode(nodes.Get_Selected_Name(use)))
 
-        return cls(useNode, name)
+        return cls(useNode, uses)
 
 
 @export
@@ -99,16 +110,19 @@ class Entity(VHDLModel_Entity, DOMMixin):
         self,
         node: Iir,
         identifier: str,
+        contextItems: Iterable[Context] = None,
         genericItems: Iterable[GenericInterfaceItem] = None,
         portItems: Iterable[PortInterfaceItem] = None,
         declaredItems: Iterable = None,
         statements: Iterable["ConcurrentStatement"] = None,
     ):
-        super().__init__(identifier, genericItems, portItems, declaredItems, statements)
+        super().__init__(
+            identifier, contextItems, genericItems, portItems, declaredItems, statements
+        )
         DOMMixin.__init__(self, node)
 
     @classmethod
-    def parse(cls, entityNode: Iir):
+    def parse(cls, entityNode: Iir, contextItems: Iterable[Context]):
         name = GetNameOfNode(entityNode)
         generics = GetGenericsFromChainedNodes(nodes.Get_Generic_Chain(entityNode))
         ports = GetPortsFromChainedNodes(nodes.Get_Port_Chain(entityNode))
@@ -121,7 +135,9 @@ class Entity(VHDLModel_Entity, DOMMixin):
 
         # FIXME: read use clauses
 
-        return cls(entityNode, name, generics, ports, declaredItems, statements)
+        return cls(
+            entityNode, name, contextItems, generics, ports, declaredItems, statements
+        )
 
 
 @export
@@ -131,14 +147,15 @@ class Architecture(VHDLModel_Architecture, DOMMixin):
         node: Iir,
         identifier: str,
         entity: EntityOrSymbol,
+        contextItems: Iterable[Context] = None,
         declaredItems: Iterable = None,
         statements: Iterable["ConcurrentStatement"] = None,
     ):
-        super().__init__(identifier, entity, declaredItems, statements)
+        super().__init__(identifier, entity, contextItems, declaredItems, statements)
         DOMMixin.__init__(self, node)
 
     @classmethod
-    def parse(cls, architectureNode: Iir):
+    def parse(cls, architectureNode: Iir, contextItems: Iterable[Context]):
         name = GetNameOfNode(architectureNode)
         entityNameNode = nodes.Get_Entity_Name(architectureNode)
         entityName = GetNameOfNode(entityNameNode)
@@ -152,7 +169,9 @@ class Architecture(VHDLModel_Architecture, DOMMixin):
 
         # FIXME: read use clauses
 
-        return cls(architectureNode, name, entity, declaredItems, statements)
+        return cls(
+            architectureNode, name, entity, contextItems, declaredItems, statements
+        )
 
 
 @export
@@ -182,14 +201,15 @@ class Package(VHDLModel_Package, DOMMixin):
         self,
         node: Iir,
         identifier: str,
+        contextItems: Iterable[Context] = None,
         genericItems: Iterable[GenericInterfaceItem] = None,
         declaredItems: Iterable = None,
     ):
-        super().__init__(identifier, genericItems, declaredItems)
+        super().__init__(identifier, contextItems, genericItems, declaredItems)
         DOMMixin.__init__(self, node)
 
     @classmethod
-    def parse(cls, packageNode: Iir):
+    def parse(cls, packageNode: Iir, contextItems: Iterable[Context]):
         name = GetNameOfNode(packageNode)
 
         packageHeader = nodes.Get_Package_Header(packageNode)
@@ -206,7 +226,7 @@ class Package(VHDLModel_Package, DOMMixin):
 
         # FIXME: read use clauses
 
-        return cls(packageNode, name, generics, declaredItems)
+        return cls(packageNode, name, contextItems, generics, declaredItems)
 
 
 @export
@@ -215,13 +235,14 @@ class PackageBody(VHDLModel_PackageBody, DOMMixin):
         self,
         node: Iir,
         identifier: str,
+        contextItems: Iterable[Context] = None,
         declaredItems: Iterable = None,
     ):
-        super().__init__(identifier, declaredItems)
+        super().__init__(identifier, contextItems, declaredItems)
         DOMMixin.__init__(self, node)
 
     @classmethod
-    def parse(cls, packageBodyNode: Iir):
+    def parse(cls, packageBodyNode: Iir, contextItems: Iterable[Context]):
         name = GetNameOfNode(packageBodyNode)
         declaredItems = GetDeclaredItemsFromChainedNodes(
             nodes.Get_Declaration_Chain(packageBodyNode), "package", name
@@ -229,7 +250,7 @@ class PackageBody(VHDLModel_PackageBody, DOMMixin):
 
         # FIXME: read use clauses
 
-        return cls(packageBodyNode, name, declaredItems)
+        return cls(packageBodyNode, name, contextItems, declaredItems)
 
 
 @export
@@ -262,17 +283,40 @@ class Context(VHDLModel_Context, DOMMixin):
         self,
         node: Iir,
         identifier: str,
+        libraryReferences: Iterable[LibraryClause] = None,
+        packageReferences: Iterable[UseClause] = None,
     ):
-        super().__init__(identifier)
+        super().__init__(identifier, libraryReferences, packageReferences)
         DOMMixin.__init__(self, node)
 
     @classmethod
     def parse(cls, contextNode: Iir):
-        name = GetNameOfNode(contextNode)
+        from pyGHDL.dom._Utils import GetIirKindOfNode
 
-        # FIXME: read use clauses
+        name = GetNameOfNode(contextNode)
 
-        return cls(contextNode, name)
+        items = []
+        names = []
+        for item in utils.chain_iter(nodes.Get_Context_Items(contextNode)):
+            kind = GetIirKindOfNode(item)
+            if kind is nodes.Iir_Kind.Library_Clause:
+                names.append(SimpleName(item, GetNameOfNode(item)))
+                if nodes.Get_Has_Identifier_List(item):
+                    continue
+
+                items.append(LibraryClause(item, names))
+                names = []
+            elif kind is nodes.Iir_Kind.Use_Clause:
+                items.append(UseClause.parse(item))
+            else:
+                pos = Position.parse(item)
+                raise DOMException(
+                    "Unknown context item kind '{kind}' in context at line {line}.".format(
+                        kind=kind.name, line=pos.Line
+                    )
+                )
+
+        return cls(contextNode, name, items)
 
 
 @export
@@ -281,15 +325,16 @@ class Configuration(VHDLModel_Configuration, DOMMixin):
         self,
         node: Iir,
         identifier: str,
+        contextItems: Iterable[Context] = None,
     ):
-        super().__init__(identifier)
+        super().__init__(identifier, contextItems)
         DOMMixin.__init__(self, node)
 
     @classmethod
-    def parse(cls, configurationNode: Iir):
+    def parse(cls, configurationNode: Iir, contextItems: Iterable[Context]):
         name = GetNameOfNode(configurationNode)
 
         # FIXME: read use clauses
         # FIXME: read specifications
 
-        return cls(configurationNode, name)
+        return cls(configurationNode, name, contextItems)
diff --git a/pyGHDL/dom/NonStandard.py b/pyGHDL/dom/NonStandard.py
index fe199d58e..b59efeacb 100644
--- a/pyGHDL/dom/NonStandard.py
+++ b/pyGHDL/dom/NonStandard.py
@@ -42,6 +42,7 @@ from typing import Any
 
 from pydecor import export
 
+from pyGHDL.dom.Names import SimpleName
 from pyVHDLModel.SyntaxModel import (
     Design as VHDLModel_Design,
     Library as VHDLModel_Library,
@@ -61,8 +62,8 @@ from pyGHDL.libghdl import (
     files_map_editor,
 )
 from pyGHDL.libghdl.vhdl import nodes, sem_lib, parse
-from pyGHDL.dom import DOMException
-from pyGHDL.dom._Utils import GetIirKindOfNode, CheckForErrors
+from pyGHDL.dom import DOMException, Position
+from pyGHDL.dom._Utils import GetIirKindOfNode, CheckForErrors, GetNameOfNode
 from pyGHDL.dom.DesignUnit import (
     Entity,
     Architecture,
@@ -71,6 +72,8 @@ from pyGHDL.dom.DesignUnit import (
     Context,
     Configuration,
     PackageInstantiation,
+    LibraryClause,
+    UseClause,
 )
 from pyGHDL.dom.PSL import VerificationUnit, VerificationProperty, VerificationMode
 
@@ -171,20 +174,43 @@ class Document(VHDLModel_Document):
             libraryUnit = nodes.Get_Library_Unit(unit)
             nodeKind = GetIirKindOfNode(libraryUnit)
 
+            contextItems = []
+            contextNames = []
+            context = nodes.Get_Context_Items(unit)
+            if context is not nodes.Null_Iir:
+                for item in utils.chain_iter(context):
+                    itemKind = GetIirKindOfNode(item)
+                    if itemKind is nodes.Iir_Kind.Library_Clause:
+                        contextNames.append(SimpleName(item, GetNameOfNode(item)))
+                        if nodes.Get_Has_Identifier_List(item):
+                            continue
+
+                        contextItems.append(LibraryClause(item, contextNames))
+                        contextNames = []
+                    elif itemKind is nodes.Iir_Kind.Use_Clause:
+                        contextItems.append(UseClause.parse(item))
+                    else:
+                        pos = Position.parse(item)
+                        raise DOMException(
+                            "Unknown context item kind '{kind}' in context at line {line}.".format(
+                                kind=itemKind.name, line=pos.Line
+                            )
+                        )
+
             if nodeKind == nodes.Iir_Kind.Entity_Declaration:
-                entity = Entity.parse(libraryUnit)
+                entity = Entity.parse(libraryUnit, contextItems)
                 self.Entities.append(entity)
 
             elif nodeKind == nodes.Iir_Kind.Architecture_Body:
-                architecture = Architecture.parse(libraryUnit)
+                architecture = Architecture.parse(libraryUnit, contextItems)
                 self.Architectures.append(architecture)
 
             elif nodeKind == nodes.Iir_Kind.Package_Declaration:
-                package = Package.parse(libraryUnit)
+                package = Package.parse(libraryUnit, contextItems)
                 self.Packages.append(package)
 
             elif nodeKind == nodes.Iir_Kind.Package_Body:
-                packageBody = PackageBody.parse(libraryUnit)
+                packageBody = PackageBody.parse(libraryUnit, contextItems)
                 self.PackageBodies.append(packageBody)
 
             elif nodeKind == nodes.Iir_Kind.Package_Instantiation_Declaration:
@@ -196,7 +222,7 @@ class Document(VHDLModel_Document):
                 self.Contexts.append(context)
 
             elif nodeKind == nodes.Iir_Kind.Configuration_Declaration:
-                configuration = Configuration.parse(libraryUnit)
+                configuration = Configuration.parse(libraryUnit, contextItems)
                 self.Configurations.append(configuration)
 
             elif nodeKind == nodes.Iir_Kind.Vunit_Declaration:
diff --git a/pyGHDL/dom/Sequential.py b/pyGHDL/dom/Sequential.py
index 0503eca25..7fe94fad5 100644
--- a/pyGHDL/dom/Sequential.py
+++ b/pyGHDL/dom/Sequential.py
@@ -276,7 +276,6 @@ class CaseStatement(VHDLModel_CaseStatement, DOMMixin):
         while alternative != nodes.Null_Iir:
             choiceKind = GetIirKindOfNode(alternative)
             sameAlternative = nodes.Get_Same_Alternative_Flag(alternative)
-            print("sameAlternative: ", sameAlternative)
 
             if choiceKind in (
                 nodes.Iir_Kind.Choice_By_Name,
diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py
index 18a4d9fda..00194cb09 100644
--- a/pyGHDL/dom/_Translate.py
+++ b/pyGHDL/dom/_Translate.py
@@ -717,7 +717,7 @@ def GetDeclaredItemsFromChainedNodes(
             elif kind == nodes.Iir_Kind.Package_Declaration:
                 from pyGHDL.dom.DesignUnit import Package
 
-                yield Package.parse(item)
+                yield Package.parse(item, None)  # TODO: Can it have a context?
             elif kind == nodes.Iir_Kind.Package_Instantiation_Declaration:
                 from pyGHDL.dom.DesignUnit import PackageInstantiation
 
diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py
index 2f582a5f8..bfb91f3da 100644
--- a/pyGHDL/dom/formatting/prettyprint.py
+++ b/pyGHDL/dom/formatting/prettyprint.py
@@ -389,8 +389,8 @@ class PrettyPrint:
             return self.formatGenericType(generic, level)
         else:
             raise PrettyPrintException(
-                "Unhandled generic kind for generic '{name}'.".format(
-                    name=generic.Identifiers[0]
+                "Unhandled generic kind '{kind}' for generic '{name}'.".format(
+                    kind=generic.__class__.__name__, name=generic.Identifiers[0]
                 )
             )
 
@@ -401,8 +401,8 @@ class PrettyPrint:
             return self.formatPortSignal(port, level)
         else:
             raise PrettyPrintException(
-                "Unhandled port kind for port '{name}'.".format(
-                    name=port.Identifiers[0]
+                "Unhandled port kind '{kind}' for port '{name}'.".format(
+                    kind=port.__class__.__name__, name=port.Identifiers[0]
                 )
             )
 
-- 
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