From 1c8872240feffcc2324a1b46a055d5afcfa3e2bb Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 18 Mar 2016 05:25:28 +0100 Subject: Document --psl-report --- doc/Simulation_and_runtime.rst | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'doc') diff --git a/doc/Simulation_and_runtime.rst b/doc/Simulation_and_runtime.rst index 329dca8d8..9a925da4b 100644 --- a/doc/Simulation_and_runtime.rst +++ b/doc/Simulation_and_runtime.rst @@ -187,6 +187,13 @@ all options available, including the debugging one. Contrary to VCD files, any VHDL type can be dumped into a GHW file. +.. option:: --psl-report= + + Write a report for PSL assertions and coverage at the end of + simulation. The file is written using the JSON format, but still + being human readable. + + .. option:: --sdf== Do VITAL annotation on `PATH` with SDF file :file:`FILENAME`. -- cgit v1.2.3