From 665ee07eb14cf2c238b8de181cf745ac700cf47d Mon Sep 17 00:00:00 2001 From: eine Date: Mon, 13 Jul 2020 17:55:47 +0200 Subject: doc: document synthesis/translate pragmas --- doc/using/Synthesis.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'doc/using/Synthesis.rst') diff --git a/doc/using/Synthesis.rst b/doc/using/Synthesis.rst index 23924fd94..3301d87d1 100644 --- a/doc/using/Synthesis.rst +++ b/doc/using/Synthesis.rst @@ -13,6 +13,17 @@ Hence, the netlists generated by GHDL are not optimised. .. NOTE:: Due to GHDL's modular architecture (see :ref:`INT:Overview`), the synthesis kernel shares the VHDL parsing front-end with the simulation back-ends. Hence, available options for synthesis are the same as for analysis and/or simulation elaboration (see :ref:`GHDL:options`). +.. HINT:: + Multiple pragmas are supported for preventing blocks of code from being synthesized: + + ``-- pragma|synopsys|synthesis (synthesis|translate)( |_)(on|off)`` + + For example: + + - ``-- pragma translate off`` + - ``-- synthesis translate_on`` + - ``-- synopsys synthesis_off`` + .. index:: synthesis command .. _Synth:command: -- cgit v1.2.3