From fb2b12d8f190660e9c4f583f9aa50bcf73838a81 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 1 Apr 2020 07:57:02 +0200 Subject: testsuite/synth: add test for #1180 --- testsuite/synth/issue1180/bug.vhdl | 33 +++++++++++++++++++++++++++++++++ testsuite/synth/issue1180/testsuite.sh | 8 ++++++++ 2 files changed, 41 insertions(+) create mode 100644 testsuite/synth/issue1180/bug.vhdl create mode 100755 testsuite/synth/issue1180/testsuite.sh diff --git a/testsuite/synth/issue1180/bug.vhdl b/testsuite/synth/issue1180/bug.vhdl new file mode 100644 index 000000000..6269ae385 --- /dev/null +++ b/testsuite/synth/issue1180/bug.vhdl @@ -0,0 +1,33 @@ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity bug is + generic( + C_HIGH : natural := 5 + ); + port( + reset_n : in std_ulogic; + clk : in std_ulogic; + res : out natural + ); +end bug; + +architecture behav of bug is + subtype st is natural range 0 to C_HIGH; + signal c : st; +begin + process(clk, reset_n) + begin + if reset_n = '0' then + c <= st'low; + elsif rising_edge(clk) then + if c = st'high then + c <= st'low; + else + c <= c + 1; + end if; + end if; + end process; + res <= c; +end architecture; diff --git a/testsuite/synth/issue1180/testsuite.sh b/testsuite/synth/issue1180/testsuite.sh new file mode 100755 index 000000000..121ca9a6a --- /dev/null +++ b/testsuite/synth/issue1180/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_analyze bug +clean + +echo "Test successful" -- cgit v1.2.3