From d13df4fd44358e070de5cc4d9c1e61f6ef8af56b Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 2 Jan 2023 09:55:34 +0100
Subject: synth: fix to_string for character
---
src/simul/simul-vhdl_elab.adb | 3 +++
src/synth/synth-vhdl_eval.adb | 10 +++++++++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb
index eca3ac783..fed1c7d74 100644
--- a/src/simul/simul-vhdl_elab.adb
+++ b/src/simul/simul-vhdl_elab.adb
@@ -985,6 +985,9 @@ package body Simul.Vhdl_Elab is
when Iir_Kind_Package_Declaration =>
Gather_Processes_Decls
(Inst, Get_Declaration_Chain (N));
+ when Iir_Kind_Package_Instantiation_Declaration =>
+ Gather_Processes_Decls
+ (Inst, Get_Declaration_Chain (N));
when Iir_Kind_Configuration_Declaration =>
null;
when others =>
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 31592bb59..2191e7a9c 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -27,6 +27,7 @@ with Grt.To_Strings;
with Grt.Arith;
with Grt.Fcvt;
+with Vhdl.Std_Package;
with Vhdl.Utils;
with Vhdl.Evaluation;
with Vhdl.Ieee.Std_Logic_1164; use Vhdl.Ieee.Std_Logic_1164;
@@ -776,7 +777,14 @@ package body Synth.Vhdl_Eval is
V := Read_Discrete (Param.Mem, Param.Typ);
Lit := Get_Nth_Element (Enums, Natural (V));
Lit_Id := Get_Identifier (Lit);
- if Is_Character (Lit_Id) then
+
+ -- LRM08 5.7 String representations
+ -- - For a given value of type CHARACTER, the string representation
+ -- contains one element that is the given value.
+ if Etype = Vhdl.Std_Package.Character_Type_Definition then
+ C (1) := Character'Val (V);
+ return String_To_Memtyp (C, Res_Typ);
+ elsif Is_Character (Lit_Id) then
C (1) := Get_Character (Lit_Id);
return String_To_Memtyp (C, Res_Typ);
else
--
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