From afedf0957ac9cdc0bc832e0b5947a3f92d79b1fb Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 9 Oct 2019 20:26:43 +0200 Subject: testsuite/synth: add testcase for previous commit. --- testsuite/synth/forgen01/forgen02.vhdl | 27 +++++++++++++++++++++++++++ testsuite/synth/forgen01/tb_forgen02.vhdl | 19 +++++++++++++++++++ testsuite/synth/forgen01/testsuite.sh | 2 +- 3 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 testsuite/synth/forgen01/forgen02.vhdl create mode 100644 testsuite/synth/forgen01/tb_forgen02.vhdl diff --git a/testsuite/synth/forgen01/forgen02.vhdl b/testsuite/synth/forgen01/forgen02.vhdl new file mode 100644 index 000000000..0562b19c5 --- /dev/null +++ b/testsuite/synth/forgen01/forgen02.vhdl @@ -0,0 +1,27 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity init is + port (o : out std_logic); +end init; + +architecture behav of init is +begin + o <= '0'; +end behav; + +library ieee; +use ieee.std_logic_1164.all; + +entity forgen02 is + port (a : out std_logic_vector (7 downto 0)); +end; + +architecture behav of forgen02 is +-- constant c : std_logic_vector (7 downto 0) := x"a1"; +begin + gen: for i in a'range generate + inst: entity work.init + port map (o => a(i)); + end generate; +end behav; diff --git a/testsuite/synth/forgen01/tb_forgen02.vhdl b/testsuite/synth/forgen01/tb_forgen02.vhdl new file mode 100644 index 000000000..21615615b --- /dev/null +++ b/testsuite/synth/forgen01/tb_forgen02.vhdl @@ -0,0 +1,19 @@ +entity tb_forgen02 is +end tb_forgen02; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_forgen02 is + signal a : std_logic_vector (7 downto 0); +begin + dut: entity work.forgen02 + port map (a); + + process + begin + wait for 1 ns; + assert a = x"00" severity failure; + wait; + end process; +end behav; diff --git a/testsuite/synth/forgen01/testsuite.sh b/testsuite/synth/forgen01/testsuite.sh index 70ee6bc2a..cbc0107c7 100755 --- a/testsuite/synth/forgen01/testsuite.sh +++ b/testsuite/synth/forgen01/testsuite.sh @@ -2,7 +2,7 @@ . ../../testenv.sh -for t in forgen01; do +for t in forgen01 forgen02; do analyze $t.vhdl tb_$t.vhdl elab_simulate tb_$t clean -- cgit v1.2.3