From 96245c0a4df7a6bc07cd8b7c15268c78c459f3b7 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 9 Nov 2021 20:54:19 +0100 Subject: vhdl: Iir_Kind_Foreign_Module is now a library unit (instead of a design unit). Also, add Iir_Kind_Foreign_Vector_Type_Definition --- pyGHDL/libghdl/vhdl/nodes.py | 5 - src/libraries.adb | 64 ++-- src/synth/elab-vhdl_insts.adb | 2 + src/synth/synth-vhdl_insts.adb | 2 + src/synth/synthesis.adb | 19 +- src/vhdl/vhdl-annotations.adb | 23 ++ src/vhdl/vhdl-canon.adb | 2 + src/vhdl/vhdl-configuration.adb | 286 ++++++++--------- src/vhdl/vhdl-elocations.adb | 3 +- src/vhdl/vhdl-elocations.ads | 2 + src/vhdl/vhdl-errors.adb | 2 + src/vhdl/vhdl-evaluation.adb | 3 + src/vhdl/vhdl-nodes.adb | 11 +- src/vhdl/vhdl-nodes.ads | 59 ++-- src/vhdl/vhdl-nodes_meta.adb | 691 ++++++++++++++++++++-------------------- src/vhdl/vhdl-prints.adb | 2 + src/vhdl/vhdl-sem.adb | 2 + src/vhdl/vhdl-sem_assocs.adb | 5 + src/vhdl/vhdl-sem_expr.adb | 26 +- src/vhdl/vhdl-sem_lib.adb | 17 +- src/vhdl/vhdl-sem_lib.ads | 7 + src/vhdl/vhdl-sem_names.adb | 5 +- src/vhdl/vhdl-sem_specs.adb | 156 ++++----- src/vhdl/vhdl-utils.adb | 3 +- 24 files changed, 730 insertions(+), 667 deletions(-) diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index d9f882b71..0c72ca51a 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -380,11 +380,6 @@ class Iir_Kinds: Iir_Kind.Architecture_Body, ] - Design_Unit = [ - Iir_Kind.Design_Unit, - Iir_Kind.Foreign_Module, - ] - Primary_Unit = [ Iir_Kind.Entity_Declaration, Iir_Kind.Configuration_Declaration, diff --git a/src/libraries.adb b/src/libraries.adb index 70c9d4178..d7ddfb5ae 100644 --- a/src/libraries.adb +++ b/src/libraries.adb @@ -231,7 +231,8 @@ package body Libraries is Lib_Unit := Get_Library_Unit (Design_Unit); case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is when Iir_Kinds_Primary_Unit - | Iir_Kind_Package_Body => + | Iir_Kind_Package_Body + | Iir_Kind_Foreign_Module => Id := Get_Identifier (Lib_Unit); when Iir_Kind_Architecture_Body => -- Architectures are put with the entity identifier. @@ -856,7 +857,8 @@ package body Libraries is Lib_Unit := Get_Library_Unit (Unit); case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is when Iir_Kinds_Primary_Unit - | Iir_Kind_Package_Body => + | Iir_Kind_Package_Body + | Iir_Kind_Foreign_Module => return Get_Identifier (Dep) = Get_Identifier (Lib_Unit); when Iir_Kind_Architecture_Body => return False; @@ -938,7 +940,11 @@ package body Libraries is while Is_Valid (File) loop Un := Get_First_Design_Unit (File); while Is_Valid (Un) loop - List := Get_Dependence_List (Un); + if Get_Kind (Un) /= Iir_Kind_Foreign_Module then + List := Get_Dependence_List (Un); + else + List := Null_Iir_List; + end if; if List /= Null_Iir_List and then Get_Date (Un) /= Date_Obsolete @@ -1588,18 +1594,14 @@ package body Libraries is if Get_Identifier (Unit) = Name and then Get_Library (Get_Design_File (Unit)) = Library then - case Iir_Kinds_Design_Unit (Get_Kind (Unit)) is - when Iir_Kind_Foreign_Module => + Lib_Unit := Get_Library_Unit (Unit); + case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is + when Iir_Kinds_Primary_Unit + | Iir_Kind_Foreign_Module => + -- Only return a primary unit. return Unit; - when Iir_Kind_Design_Unit => - Lib_Unit := Get_Library_Unit (Unit); - case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is - when Iir_Kinds_Primary_Unit => - -- Only return a primary unit. - return Unit; - when Iir_Kinds_Secondary_Unit => - null; - end case; + when Iir_Kinds_Secondary_Unit => + null; end case; end if; Unit := Get_Hash_Chain (Unit); @@ -1622,10 +1624,12 @@ package body Libraries is begin Design_Unit := Unit_Hash_Table (Primary_Ident mod Unit_Hash_Length); while Design_Unit /= Null_Iir loop - Library_Unit := Get_Library_Unit (Design_Unit); -- The secondary is always in the same library as the primary. - if Get_Library (Get_Design_File (Design_Unit)) = Lib_Prim then + if Get_Kind (Design_Unit) /= Iir_Kind_Foreign_Module + and then Get_Library (Get_Design_File (Design_Unit)) = Lib_Prim + then + Library_Unit := Get_Library_Unit (Design_Unit); -- Set design_unit to null iff this is not the correct -- design unit. case Get_Kind (Library_Unit) is @@ -1660,33 +1664,23 @@ package body Libraries is is Res : Iir_Design_Unit := Null_Iir; Unit : Iir_Design_Unit; - Unit1 : Iir; - begin Res := Null_Iir; Unit := Unit_Hash_Table (Name mod Unit_Hash_Length); while Unit /= Null_Iir loop if Get_Identifier (Unit) = Name then - case Iir_Kinds_Design_Unit (Get_Kind (Unit)) is - when Iir_Kind_Foreign_Module => - Unit1 := Unit; - when Iir_Kind_Design_Unit => - if Get_Kind (Get_Library_Unit (Unit)) - = Iir_Kind_Entity_Declaration - then - Unit1 := Unit; + case Get_Kind (Get_Library_Unit (Unit)) is + when Iir_Kind_Entity_Declaration + | Iir_Kind_Foreign_Module => + if Res /= Null_Iir then + -- Many entities. + return Null_Iir; else - Unit1 := Null_Iir; + Res := Unit; end if; + when others => + null; end case; - if Unit1 /= Null_Iir then - if Res = Null_Iir then - Res := Unit; - else - -- Many entities. - return Null_Iir; - end if; - end if; end if; Unit := Get_Hash_Chain (Unit); end loop; diff --git a/src/synth/elab-vhdl_insts.adb b/src/synth/elab-vhdl_insts.adb index f2f53bb68..aa8203045 100644 --- a/src/synth/elab-vhdl_insts.adb +++ b/src/synth/elab-vhdl_insts.adb @@ -232,6 +232,8 @@ package body Elab.Vhdl_Insts is null; when Iir_Kinds_Verification_Unit => null; + when Iir_Kind_Foreign_Module => + raise Internal_Error; end case; end if; Next (Dep_It); diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index 5394834ab..914b0e02a 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -1208,6 +1208,8 @@ package body Synth.Vhdl_Insts is null; when Iir_Kinds_Verification_Unit => null; + when Iir_Kind_Foreign_Module => + raise Internal_Error; end case; end if; Next (Dep_It); diff --git a/src/synth/synthesis.adb b/src/synth/synthesis.adb index 57d20df13..8a2f3de67 100644 --- a/src/synth/synthesis.adb +++ b/src/synth/synthesis.adb @@ -50,18 +50,19 @@ package body Synthesis is Encoding : Name_Encoding) return Module is Base : Base_Instance_Acc; + Unit : Iir; begin Base := Make_Base_Instance; - case Iir_Kinds_Design_Unit (Get_Kind (Design)) is - when Iir_Kind_Foreign_Module => - if Synth_Top_Foreign = null then - raise Internal_Error; - end if; - Synth_Top_Foreign (Base, Get_Foreign_Node (Design), Encoding); - when Iir_Kind_Design_Unit => - Synth_Top_Entity (Base, Design, Encoding, Inst); - end case; + Unit := Get_Library_Unit (Design); + if Get_Kind (Unit) = Iir_Kind_Foreign_Module then + if Synth_Top_Foreign = null then + raise Internal_Error; + end if; + Synth_Top_Foreign (Base, Get_Foreign_Node (Unit), Encoding); + else + Synth_Top_Entity (Base, Design, Encoding, Inst); + end if; Synth.Vhdl_Insts.Synth_All_Instances; diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 93dbaf342..b1a36646e 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -434,6 +434,12 @@ package body Vhdl.Annotations is when Iir_Kind_Incomplete_Type_Definition => null; + when Iir_Kind_Foreign_Vector_Type_Definition => + if Flag_Synthesis then + -- For the bounds. + Create_Object_Info (Block_Info, Def, Kind_Type); + end if; + when others => Error_Kind ("annotate_type_definition", Def); end case; @@ -1186,6 +1192,21 @@ package body Vhdl.Annotations is end loop; end Annotate_Vunit_Declaration; + procedure Annotate_Foreign_Module (Decl : Iir) + is + Info: Sim_Info_Acc; + begin + Info := new Sim_Info_Type'(Kind => Kind_Block, + Ref => Decl, + Inst_Slot => Invalid_Object_Slot, + Nbr_Objects => 0, + Nbr_Instances => 0); + Set_Info (Decl, Info); + + Annotate_Interface_List (Info, Get_Generic_Chain (Decl), True); + Annotate_Interface_List (Info, Get_Port_Chain (Decl), True); + end Annotate_Foreign_Module; + procedure Annotate_Component_Configuration (Conf : Iir_Component_Configuration) is @@ -1299,6 +1320,8 @@ package body Vhdl.Annotations is null; when Iir_Kind_Vunit_Declaration => Annotate_Vunit_Declaration (El); + when Iir_Kind_Foreign_Module => + Annotate_Foreign_Module (El); when others => Error_Kind ("annotate2", El); end case; diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb index fb3759991..8d0c08bc3 100644 --- a/src/vhdl/vhdl-canon.adb +++ b/src/vhdl/vhdl-canon.adb @@ -3516,6 +3516,8 @@ package body Vhdl.Canon is when Iir_Kind_Vmode_Declaration | Iir_Kind_Vprop_Declaration => null; + when Iir_Kind_Foreign_Module => + raise Internal_Error; end case; end Canonicalize; diff --git a/src/vhdl/vhdl-configuration.adb b/src/vhdl/vhdl-configuration.adb index cbe12e845..a20131908 100644 --- a/src/vhdl/vhdl-configuration.adb +++ b/src/vhdl/vhdl-configuration.adb @@ -113,7 +113,7 @@ package body Vhdl.Configuration is -- Note: a design unit may be referenced but unused. -- (eg: component specification which does not apply). List := Get_Dependence_List (Unit); - It := List_Iterate (List); + It := List_Iterate_Safe (List); while Is_Valid (It) loop El := Get_Element (It); El := Libraries.Find_Design_Unit (El); @@ -186,6 +186,7 @@ package body Vhdl.Configuration is when Iir_Kinds_Verification_Unit => Add_Verification_Unit_Items (Lib_Unit); when Iir_Kind_Entity_Declaration + | Iir_Kind_Foreign_Module | Iir_Kind_Package_Body | Iir_Kind_Context_Declaration => null; @@ -311,98 +312,101 @@ package body Vhdl.Configuration is end loop; end Add_Verification_Unit_Items; - procedure Add_Design_Aspect (Aspect : Iir; Add_Default : Boolean) + -- ASPECT is an entity_aspect_entity. + procedure Add_Design_Aspect_Entity (Aspect : Iir; Add_Default : Boolean) is - use Libraries; - - Loc : Location_Type; + Loc : constant Location_Type := Get_Location (Aspect); + Entity_Lib : constant Iir := Get_Entity (Aspect); Entity : Iir; Arch_Name : Iir; Arch : Iir; Config : Iir; Arch_Lib : Iir; Id : Name_Id; - Entity_Lib : Iir; begin - if Aspect = Null_Iir then + if Entity_Lib = Null_Iir then + -- In case of error (using -c). return; end if; - Loc := Get_Location (Aspect); - case Get_Kind (Aspect) is - when Iir_Kind_Entity_Aspect_Entity => - -- Add the entity. - Entity_Lib := Get_Entity (Aspect); - if Entity_Lib = Null_Iir then - -- In case of error (using -c). - return; - end if; - if Get_Kind (Entity_Lib) = Iir_Kind_Foreign_Module then - return; - end if; - Entity := Get_Design_Unit (Entity_Lib); - Add_Design_Unit (Entity, Loc); - - -- Extract and add the architecture. - Arch_Name := Get_Architecture (Aspect); - if Arch_Name /= Null_Iir then - case Get_Kind (Arch_Name) is - when Iir_Kind_Simple_Name => - Id := Get_Identifier (Arch_Name); - Arch := Load_Secondary_Unit (Entity, Id, Aspect); - if Arch = Null_Iir then - Error_Msg_Elab ("cannot find architecture %i of %n", - (+Id, +Entity_Lib)); - return; - else - Set_Named_Entity (Arch_Name, Get_Library_Unit (Arch)); - end if; - when Iir_Kind_Reference_Name => - Arch := Get_Design_Unit (Get_Named_Entity (Arch_Name)); - when others => - Error_Kind ("add_design_aspect", Arch_Name); - end case; - else - Arch := Get_Latest_Architecture (Entity_Lib); - if Arch = Null_Iir then - Error_Msg_Elab (Aspect, "no architecture in library for %n", - +Entity_Lib); - return; - end if; - Arch := Get_Design_Unit (Arch); - end if; - Load_Design_Unit (Arch, Aspect); - - -- Add the default configuration if required. Must be done - -- before the architecture in case of recursive instantiation: - -- the configuration depends on the architecture. - if Add_Default then - Arch_Lib := Get_Library_Unit (Arch); - - -- The default configuration may already exist due to a - -- previous instantiation. Create it if it doesn't exist. - Config := Get_Default_Configuration_Declaration (Arch_Lib); - if Is_Null (Config) then - Config := Vhdl.Canon.Create_Default_Configuration_Declaration - (Arch_Lib); - Set_Default_Configuration_Declaration (Arch_Lib, Config); - end if; - if Get_Configuration_Mark_Flag (Config) - and then not Get_Configuration_Done_Flag (Config) - then - -- Recursive instantiation. + -- Add the entity. + Entity := Get_Design_Unit (Entity_Lib); + Add_Design_Unit (Entity, Loc); + + if Get_Kind (Entity_Lib) = Iir_Kind_Foreign_Module then + return; + end if; + + -- Extract and add the architecture. + Arch_Name := Get_Architecture (Aspect); + if Arch_Name /= Null_Iir then + case Get_Kind (Arch_Name) is + when Iir_Kind_Simple_Name => + Id := Get_Identifier (Arch_Name); + Arch := Load_Secondary_Unit (Entity, Id, Aspect); + if Arch = Null_Iir then + Error_Msg_Elab ("cannot find architecture %i of %n", + (+Id, +Entity_Lib)); return; else - Add_Design_Unit (Config, Loc); + Set_Named_Entity (Arch_Name, Get_Library_Unit (Arch)); end if; - end if; + when Iir_Kind_Reference_Name => + Arch := Get_Design_Unit (Get_Named_Entity (Arch_Name)); + when others => + Error_Kind ("add_design_aspect", Arch_Name); + end case; + else + Arch := Libraries.Get_Latest_Architecture (Entity_Lib); + if Arch = Null_Iir then + Error_Msg_Elab + (Aspect, "no architecture in library for %n", +Entity_Lib); + return; + end if; + Arch := Get_Design_Unit (Arch); + end if; + Load_Design_Unit (Arch, Aspect); + + -- Add the default configuration if required. Must be done + -- before the architecture in case of recursive instantiation: + -- the configuration depends on the architecture. + if Add_Default then + Arch_Lib := Get_Library_Unit (Arch); + + -- The default configuration may already exist due to a + -- previous instantiation. Create it if it doesn't exist. + Config := Get_Default_Configuration_Declaration (Arch_Lib); + if Is_Null (Config) then + Config := Vhdl.Canon.Create_Default_Configuration_Declaration + (Arch_Lib); + Set_Default_Configuration_Declaration (Arch_Lib, Config); + end if; - -- Otherwise, simply the architecture. - Add_Design_Unit (Arch, Loc); + if Get_Configuration_Mark_Flag (Config) + and then not Get_Configuration_Done_Flag (Config) + then + -- Recursive instantiation. + return; + else + Add_Design_Unit (Config, Loc); + end if; + end if; + + -- Otherwise, simply the architecture. + Add_Design_Unit (Arch, Loc); + end Add_Design_Aspect_Entity; + procedure Add_Design_Aspect (Aspect : Iir; Add_Default : Boolean) is + begin + if Aspect = Null_Iir then + return; + end if; + case Get_Kind (Aspect) is + when Iir_Kind_Entity_Aspect_Entity => + Add_Design_Aspect_Entity (Aspect, Add_Default); when Iir_Kind_Entity_Aspect_Configuration => - Add_Design_Unit - (Get_Design_Unit (Get_Configuration (Aspect)), Loc); + Add_Design_Unit (Get_Design_Unit (Get_Configuration (Aspect)), + Get_Location (Aspect)); when Iir_Kind_Entity_Aspect_Open => null; when others => @@ -937,27 +941,24 @@ package body Vhdl.Configuration is end if; end if; - case Iir_Kinds_Design_Unit (Get_Kind (Design)) is - when Iir_Kind_Design_Unit => + Lib_Unit := Get_Library_Unit (Design); + case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is + when Iir_Kind_Architecture_Body + | Iir_Kind_Configuration_Declaration + | Iir_Kinds_Verification_Unit => + Load_Design_Unit (Design, Loc_Err); + when Iir_Kind_Entity_Declaration => + Load_Design_Unit (Design, Loc_Err); + -- Library unit has changed (loaded). Lib_Unit := Get_Library_Unit (Design); - case Iir_Kinds_Library_Unit (Get_Kind (Lib_Unit)) is - when Iir_Kind_Architecture_Body - | Iir_Kind_Configuration_Declaration - | Iir_Kinds_Verification_Unit => - Load_Design_Unit (Design, Loc_Err); - when Iir_Kind_Entity_Declaration => - Load_Design_Unit (Design, Loc_Err); - -- Library unit has changed (loaded). - Lib_Unit := Get_Library_Unit (Design); - Vhdl.Sem_Scopes.Add_Name (Lib_Unit); - when Iir_Kind_Package_Declaration - | Iir_Kind_Package_Instantiation_Declaration - | Iir_Kind_Package_Body - | Iir_Kind_Context_Declaration => - null; - end case; + Vhdl.Sem_Scopes.Add_Name (Lib_Unit); when Iir_Kind_Foreign_Module => - Vhdl.Sem_Scopes.Add_Name (Design); + Vhdl.Sem_Scopes.Add_Name (Lib_Unit); + when Iir_Kind_Package_Declaration + | Iir_Kind_Package_Instantiation_Declaration + | Iir_Kind_Package_Body + | Iir_Kind_Context_Declaration => + null; end case; return Walk_Continue; @@ -1015,14 +1016,7 @@ package body Vhdl.Configuration is Interp := Get_Interpretation (Get_Identifier (Comp)); if Valid_Interpretation (Interp) then Decl := Get_Declaration (Interp); - case Get_Kind (Decl) is - when Iir_Kind_Entity_Declaration => - Set_Elab_Flag (Get_Design_Unit (Decl), True); - when Iir_Kind_Foreign_Module => - Set_Elab_Flag (Decl, True); - when others => - raise Internal_Error; - end case; + Set_Elab_Flag (Get_Design_Unit (Decl), True); else -- If there is no corresponding entity name for the -- component name, assume it belongs to a different @@ -1051,49 +1045,42 @@ package body Vhdl.Configuration is end if; end if; - case Get_Kind (Design) is - when Iir_Kind_Design_Unit => - Unit := Get_Library_Unit (Design); - case Iir_Kinds_Library_Unit (Get_Kind (Unit)) is - when Iir_Kind_Architecture_Body => - Status := Walk_Concurrent_Statements_Chain - (Get_Concurrent_Statement_Chain (Unit), - Mark_Instantiation_Cb'Access); - pragma Assert (Status = Walk_Continue); - when Iir_Kind_Configuration_Declaration => - -- Just ignored. - null; - when Iir_Kinds_Verification_Unit => - declare - Item : Iir; - begin - Item := Get_Vunit_Item_Chain (Unit); - while Item /= Null_Iir loop - if Get_Kind (Item) in Iir_Kinds_Concurrent_Statement - then - Status := Walk_Concurrent_Statement - (Item, Mark_Instantiation_Cb'Access); - pragma Assert (Status = Walk_Continue); - end if; - Item := Get_Chain (Item); - end loop; - end; - when Iir_Kind_Package_Declaration - | Iir_Kind_Package_Instantiation_Declaration - | Iir_Kind_Package_Body - | Iir_Kind_Entity_Declaration - | Iir_Kind_Context_Declaration => - null; - end case; - + Unit := Get_Library_Unit (Design); + case Iir_Kinds_Library_Unit (Get_Kind (Unit)) is + when Iir_Kind_Architecture_Body => + Status := Walk_Concurrent_Statements_Chain + (Get_Concurrent_Statement_Chain (Unit), + Mark_Instantiation_Cb'Access); + pragma Assert (Status = Walk_Continue); + when Iir_Kind_Configuration_Declaration => + -- Just ignored. + null; + when Iir_Kinds_Verification_Unit => + declare + Item : Iir; + begin + Item := Get_Vunit_Item_Chain (Unit); + while Item /= Null_Iir loop + if Get_Kind (Item) in Iir_Kinds_Concurrent_Statement + then + Status := Walk_Concurrent_Statement + (Item, Mark_Instantiation_Cb'Access); + pragma Assert (Status = Walk_Continue); + end if; + Item := Get_Chain (Item); + end loop; + end; when Iir_Kind_Foreign_Module => if Mark_Foreign_Module = null then raise Internal_Error; end if; - Mark_Foreign_Module.all (Get_Foreign_Node (Design)); - - when others => - raise Internal_Error; + Mark_Foreign_Module.all (Get_Foreign_Node (Unit)); + when Iir_Kind_Package_Declaration + | Iir_Kind_Package_Instantiation_Declaration + | Iir_Kind_Package_Body + | Iir_Kind_Entity_Declaration + | Iir_Kind_Context_Declaration => + null; end case; return Walk_Continue; end Mark_Units_Cb; @@ -1127,16 +1114,13 @@ package body Vhdl.Configuration is is Unit : Iir; begin - case Iir_Kinds_Design_Unit (Get_Kind (Design)) is - when Iir_Kind_Foreign_Module => - Unit := Design; - when Iir_Kind_Design_Unit => - Unit := Get_Library_Unit (Design); + Unit := Get_Library_Unit (Design); - if Get_Kind (Unit) /= Iir_Kind_Entity_Declaration then - return Walk_Continue; - end if; - end case; + if not Kind_In (Unit, + Iir_Kind_Entity_Declaration, Iir_Kind_Foreign_Module) + then + return Walk_Continue; + end if; if Get_Elab_Flag (Design) then -- Clean elab flag. diff --git a/src/vhdl/vhdl-elocations.adb b/src/vhdl/vhdl-elocations.adb index 657e7921c..dbd610d3c 100644 --- a/src/vhdl/vhdl-elocations.adb +++ b/src/vhdl/vhdl-elocations.adb @@ -207,7 +207,6 @@ package body Vhdl.Elocations is | Iir_Kind_Error | Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Use_Clause | Iir_Kind_Context_Reference | Iir_Kind_PSL_Inherit_Spec @@ -266,11 +265,13 @@ package body Vhdl.Elocations is | Iir_Kind_Physical_Type_Definition | Iir_Kind_Range_Expression | Iir_Kind_Wildcard_Type_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kind_Subtype_Definition | Iir_Kind_Scalar_Nature_Definition | Iir_Kind_Array_Nature_Definition | Iir_Kind_Array_Subnature_Definition | Iir_Kind_Overload_List + | Iir_Kind_Foreign_Module | Iir_Kind_Vmode_Declaration | Iir_Kind_Vprop_Declaration | Iir_Kind_Vunit_Declaration diff --git a/src/vhdl/vhdl-elocations.ads b/src/vhdl/vhdl-elocations.ads index 1b6f41e46..eaa1f78a1 100644 --- a/src/vhdl/vhdl-elocations.ads +++ b/src/vhdl/vhdl-elocations.ads @@ -374,6 +374,8 @@ package Vhdl.Elocations is -- Iir_Kind_Wildcard_Type_Definition (None) + -- Iir_Kind_Foreign_Vector_Type_Definition (None) + -------------------------- -- subtype definitions -- -------------------------- diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb index 01fa3c0cd..d2cfff8dd 100644 --- a/src/vhdl/vhdl-errors.adb +++ b/src/vhdl/vhdl-errors.adb @@ -342,6 +342,8 @@ package body Vhdl.Errors is return Disp_Type (Node, "protected type body"); when Iir_Kind_Subtype_Definition => return "subtype definition"; + when Iir_Kind_Foreign_Vector_Type_Definition => + return "foreign vector type definition"; when Iir_Kind_Scalar_Nature_Definition => return Disp_Nature (Node, "scalar nature"); diff --git a/src/vhdl/vhdl-evaluation.adb b/src/vhdl/vhdl-evaluation.adb index 962aa96cd..cde9c2fcd 100644 --- a/src/vhdl/vhdl-evaluation.adb +++ b/src/vhdl/vhdl-evaluation.adb @@ -3936,6 +3936,9 @@ package body Vhdl.Evaluation is | Iir_Kind_Protected_Type_Declaration => return True; + when Iir_Kind_Foreign_Vector_Type_Definition => + return True; + when Iir_Kind_Error => return True; diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 478f59784..94c01f275 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1243,7 +1243,6 @@ package body Vhdl.Nodes is return Format_Short; when Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Block_Header | Iir_Kind_Binding_Indication | Iir_Kind_Signature @@ -1252,11 +1251,13 @@ package body Vhdl.Nodes is | Iir_Kind_Array_Subtype_Definition | Iir_Kind_Record_Subtype_Definition | Iir_Kind_Floating_Subtype_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kind_Subtype_Definition | Iir_Kind_Scalar_Nature_Definition | Iir_Kind_Record_Nature_Definition | Iir_Kind_Array_Nature_Definition | Iir_Kind_Array_Subnature_Definition + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Package_Declaration | Iir_Kind_Package_Instantiation_Declaration @@ -1623,7 +1624,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Library_Unit (Get_Kind (Design_Unit)), "no field Library_Unit"); - return Get_Field5 (Design_Unit); + return Get_Field7 (Design_Unit); end Get_Library_Unit; procedure Set_Library_Unit (Design_Unit : Iir_Design_Unit; Lib_Unit : Iir) @@ -1632,7 +1633,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Library_Unit (Get_Kind (Design_Unit)), "no field Library_Unit"); - Set_Field5 (Design_Unit, Lib_Unit); + Set_Field7 (Design_Unit, Lib_Unit); end Set_Library_Unit; function Get_Hash_Chain (Design_Unit : Iir_Design_Unit) return Iir is @@ -1640,7 +1641,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Hash_Chain (Get_Kind (Design_Unit)), "no field Hash_Chain"); - return Get_Field7 (Design_Unit); + return Get_Field5 (Design_Unit); end Get_Hash_Chain; procedure Set_Hash_Chain (Design_Unit : Iir_Design_Unit; Chain : Iir) is @@ -1648,7 +1649,7 @@ package body Vhdl.Nodes is pragma Assert (Design_Unit /= Null_Iir); pragma Assert (Has_Hash_Chain (Get_Kind (Design_Unit)), "no field Hash_Chain"); - Set_Field7 (Design_Unit, Chain); + Set_Field5 (Design_Unit, Chain); end Set_Hash_Chain; function Get_Design_Unit_Source_Pos (Design_Unit : Iir) return Source_Ptr diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 0e4e07809..1295c59c1 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -234,10 +234,10 @@ package Vhdl.Nodes is -- -- Get/Set the library unit, which can be an entity, an architecture, -- a package, a package body or a configuration. - -- Get/Set_Library_Unit (Field5) + -- Get/Set_Library_Unit (Field7) -- -- Collision chain for units. - -- Get/Set_Hash_Chain (Field7) + -- Get/Set_Hash_Chain (Field5) -- -- Get the list of design units that must be analysed before this unit. -- See LRM93 11.4 for the rules defining the order of analysis. @@ -267,25 +267,6 @@ package Vhdl.Nodes is -- Get/Set_Configuration_Mark_Flag (Flag4) -- Get/Set_Configuration_Done_Flag (Flag5) - -- Iir_Kind_Foreign_Module (Medium) - -- - -- Get/Set_Design_File (Field0) - -- Get/Set_Parent (Alias Field0) - -- - -- Get/Set_Identifier (Field3) - -- - -- Get/Set_Foreign_Node (Field1) - -- - -- Get/Set_Date (Field4) - -- - -- Get/Set_Chain (Field2) - -- - -- Get/Set_Hash_Chain (Field7) - -- - -- Get/Set_Date_State (State1) - -- - -- Get/Set_Elab_Flag (Flag3) - -- Iir_Kind_Library_Clause (Short) -- -- LRM08 13.2 Design libraries @@ -929,6 +910,19 @@ package Vhdl.Nodes is -- Declarations -- ------------------- + -- Iir_Kind_Foreign_Module (Medium) + -- + -- Get/Set_Design_Unit (Field0) + -- Get/Set_Parent (Alias Field0) + -- + -- Get/Set_Identifier (Field3) + -- + -- Get/Set_Foreign_Node (Field1) + -- + -- Get/Set_Generic_Chain (Field6) + -- + -- Get/Set_Port_Chain (Field7) + -- Iir_Kind_Entity_Declaration (Medium) -- -- Get/Set_Parent (Field0) @@ -2748,6 +2742,15 @@ package Vhdl.Nodes is -- -- Get/Set_Type_Staticness (State1) + -- Iir_Kind_Foreign_Vector_Type_Definition (Medium) + -- + -- A one dimensional array representing a vector defined in a foreign + -- language. + -- + -- FIXME: add constraint state, add length + -- + -- Get/Set_Type_Declarator (Field3) + -------------------------- -- subtype definitions -- -------------------------- @@ -4828,7 +4831,6 @@ package Vhdl.Nodes is Iir_Kind_Design_File, Iir_Kind_Design_Unit, - Iir_Kind_Foreign_Module, Iir_Kind_Library_Clause, Iir_Kind_Use_Clause, @@ -4913,6 +4915,7 @@ package Vhdl.Nodes is Iir_Kind_Range_Expression, Iir_Kind_Protected_Type_Body, Iir_Kind_Wildcard_Type_Definition, + Iir_Kind_Foreign_Vector_Type_Definition, Iir_Kind_Subtype_Definition, -- temporary (must not appear after sem). -- Nature definition @@ -4925,6 +4928,7 @@ package Vhdl.Nodes is Iir_Kind_Overload_List, -- used internally by sem_expr. -- Declarations. + Iir_Kind_Foreign_Module, Iir_Kind_Entity_Declaration, Iir_Kind_Configuration_Declaration, Iir_Kind_Context_Declaration, @@ -6352,7 +6356,8 @@ package Vhdl.Nodes is -- * the last line must be the highest bound of the range, followed by ";" subtype Iir_Kinds_Library_Unit is Iir_Kind range - Iir_Kind_Entity_Declaration .. + Iir_Kind_Foreign_Module .. + --Iir_Kind_Entity_Declaration --Iir_Kind_Configuration_Declaration --Iir_Kind_Context_Declaration --Iir_Kind_Package_Declaration @@ -6363,10 +6368,6 @@ package Vhdl.Nodes is --Iir_Kind_Package_Body Iir_Kind_Architecture_Body; - subtype Iir_Kinds_Design_Unit is Iir_Kind range - Iir_Kind_Design_Unit .. - Iir_Kind_Foreign_Module; - subtype Iir_Kinds_Primary_Unit is Iir_Kind range Iir_Kind_Entity_Declaration .. --Iir_Kind_Configuration_Declaration @@ -7526,14 +7527,14 @@ package Vhdl.Nodes is procedure Set_Guarded_Target_State (Stmt : Iir; State : Tri_State_Type); -- Library unit of a design unit. - -- Field: Field5 + -- Field: Field7 function Get_Library_Unit (Design_Unit : Iir_Design_Unit) return Iir; procedure Set_Library_Unit (Design_Unit : Iir_Design_Unit; Lib_Unit : Iir); pragma Inline (Get_Library_Unit); -- Every design unit is put in an hash table to find quickly found by its -- name. This field is a single chain for collisions. - -- Field: Field7 Forward_Ref + -- Field: Field5 Forward_Ref function Get_Hash_Chain (Design_Unit : Iir_Design_Unit) return Iir; procedure Set_Hash_Chain (Design_Unit : Iir_Design_Unit; Chain : Iir); diff --git a/src/vhdl/vhdl-nodes_meta.adb b/src/vhdl/vhdl-nodes_meta.adb index 1dca644ec..53eceebd9 100644 --- a/src/vhdl/vhdl-nodes_meta.adb +++ b/src/vhdl/vhdl-nodes_meta.adb @@ -1157,8 +1157,6 @@ package body Vhdl.Nodes_Meta is return "design_file"; when Iir_Kind_Design_Unit => return "design_unit"; - when Iir_Kind_Foreign_Module => - return "foreign_module"; when Iir_Kind_Library_Clause => return "library_clause"; when Iir_Kind_Use_Clause => @@ -1303,6 +1301,8 @@ package body Vhdl.Nodes_Meta is return "protected_type_body"; when Iir_Kind_Wildcard_Type_Definition => return "wildcard_type_definition"; + when Iir_Kind_Foreign_Vector_Type_Definition => + return "foreign_vector_type_definition"; when Iir_Kind_Subtype_Definition => return "subtype_definition"; when Iir_Kind_Scalar_Nature_Definition => @@ -1315,6 +1315,8 @@ package body Vhdl.Nodes_Meta is return "array_subnature_definition"; when Iir_Kind_Overload_List => return "overload_list"; + when Iir_Kind_Foreign_Module => + return "foreign_module"; when Iir_Kind_Entity_Declaration => return "entity_declaration"; when Iir_Kind_Configuration_Declaration => @@ -2580,15 +2582,6 @@ package body Vhdl.Nodes_Meta is Field_Hash_Chain, Field_Dependence_List, Field_Analysis_Checks_List, - -- Iir_Kind_Foreign_Module - Field_Foreign_Node, - Field_Identifier, - Field_Date, - Field_Elab_Flag, - Field_Date_State, - Field_Design_File, - Field_Chain, - Field_Hash_Chain, -- Iir_Kind_Library_Clause Field_Identifier, Field_Has_Identifier_List, @@ -3113,6 +3106,8 @@ package body Vhdl.Nodes_Meta is Field_Signal_Type_Flag, Field_Type_Staticness, Field_Type_Declarator, + -- Iir_Kind_Foreign_Vector_Type_Definition + Field_Type_Declarator, -- Iir_Kind_Subtype_Definition Field_Is_Ref, Field_Range_Constraint, @@ -3177,6 +3172,12 @@ package body Vhdl.Nodes_Meta is Field_Through_Type, -- Iir_Kind_Overload_List Field_Overload_List, + -- Iir_Kind_Foreign_Module + Field_Foreign_Node, + Field_Identifier, + Field_Design_Unit, + Field_Generic_Chain, + Field_Port_Chain, -- Iir_Kind_Entity_Declaration Field_Identifier, Field_Has_Begin, @@ -5255,321 +5256,322 @@ package body Vhdl.Nodes_Meta is Iir_Kind_Error => 6, Iir_Kind_Design_File => 17, Iir_Kind_Design_Unit => 33, - Iir_Kind_Foreign_Module => 41, - Iir_Kind_Library_Clause => 46, - Iir_Kind_Use_Clause => 50, - Iir_Kind_Context_Reference => 54, - Iir_Kind_PSL_Inherit_Spec => 58, - Iir_Kind_Integer_Literal => 63, - Iir_Kind_Floating_Point_Literal => 68, - Iir_Kind_Null_Literal => 70, - Iir_Kind_String_Literal8 => 81, - Iir_Kind_Physical_Int_Literal => 87, - Iir_Kind_Physical_Fp_Literal => 93, - Iir_Kind_Simple_Aggregate => 98, - Iir_Kind_Overflow_Literal => 101, - Iir_Kind_Unaffected_Waveform => 102, - Iir_Kind_Waveform_Element => 105, - Iir_Kind_Conditional_Waveform => 109, - Iir_Kind_Conditional_Expression => 113, - Iir_Kind_Association_Element_By_Expression => 121, - Iir_Kind_Association_Element_By_Name => 129, - Iir_Kind_Association_Element_By_Individual => 138, - Iir_Kind_Association_Element_Open => 144, - Iir_Kind_Association_Element_Package => 150, - Iir_Kind_Association_Element_Type => 158, - Iir_Kind_Association_Element_Subprogram => 164, - Iir_Kind_Association_Element_Terminal => 170, - Iir_Kind_Choice_By_Range => 178, - Iir_Kind_Choice_By_Expression => 186, - Iir_Kind_Choice_By_Others => 192, - Iir_Kind_Choice_By_None => 198, - Iir_Kind_Choice_By_Name => 205, - Iir_Kind_Entity_Aspect_Entity => 207, - Iir_Kind_Entity_Aspect_Configuration => 208, - Iir_Kind_Entity_Aspect_Open => 208, - Iir_Kind_Psl_Hierarchical_Name => 210, - Iir_Kind_Block_Configuration => 216, - Iir_Kind_Block_Header => 220, - Iir_Kind_Component_Configuration => 227, - Iir_Kind_Binding_Indication => 231, - Iir_Kind_Entity_Class => 233, - Iir_Kind_Attribute_Value => 241, - Iir_Kind_Signature => 244, - Iir_Kind_Aggregate_Info => 251, - Iir_Kind_Procedure_Call => 255, - Iir_Kind_Record_Element_Constraint => 263, - Iir_Kind_Array_Element_Resolution => 265, - Iir_Kind_Record_Resolution => 266, - Iir_Kind_Record_Element_Resolution => 269, - Iir_Kind_Break_Element => 273, - Iir_Kind_Attribute_Specification => 282, - Iir_Kind_Disconnection_Specification => 288, - Iir_Kind_Step_Limit_Specification => 294, - Iir_Kind_Configuration_Specification => 300, - Iir_Kind_Access_Type_Definition => 307, - Iir_Kind_Incomplete_Type_Definition => 314, - Iir_Kind_Interface_Type_Definition => 320, - Iir_Kind_File_Type_Definition => 326, - Iir_Kind_Protected_Type_Declaration => 335, - Iir_Kind_Record_Type_Definition => 345, - Iir_Kind_Array_Type_Definition => 356, - Iir_Kind_Array_Subtype_Definition => 373, - Iir_Kind_Record_Subtype_Definition => 386, - Iir_Kind_Access_Subtype_Definition => 394, - Iir_Kind_Physical_Subtype_Definition => 404, - Iir_Kind_Floating_Subtype_Definition => 415, - Iir_Kind_Integer_Subtype_Definition => 425, - Iir_Kind_Enumeration_Subtype_Definition => 435, - Iir_Kind_Enumeration_Type_Definition => 446, - Iir_Kind_Integer_Type_Definition => 454, - Iir_Kind_Floating_Type_Definition => 462, - Iir_Kind_Physical_Type_Definition => 473, - Iir_Kind_Range_Expression => 481, - Iir_Kind_Protected_Type_Body => 489, - Iir_Kind_Wildcard_Type_Definition => 493, - Iir_Kind_Subtype_Definition => 500, - Iir_Kind_Scalar_Nature_Definition => 508, - Iir_Kind_Record_Nature_Definition => 521, - Iir_Kind_Array_Nature_Definition => 535, - Iir_Kind_Array_Subnature_Definition => 550, - Iir_Kind_Overload_List => 551, - Iir_Kind_Entity_Declaration => 564, - Iir_Kind_Configuration_Declaration => 574, - Iir_Kind_Context_Declaration => 580, - Iir_Kind_Package_Declaration => 595, - Iir_Kind_Package_Instantiation_Declaration => 609, - Iir_Kind_Vmode_Declaration => 620, - Iir_Kind_Vprop_Declaration => 631, - Iir_Kind_Vunit_Declaration => 643, - Iir_Kind_Package_Body => 651, - Iir_Kind_Architecture_Body => 664, - Iir_Kind_Type_Declaration => 671, - Iir_Kind_Anonymous_Type_Declaration => 677, - Iir_Kind_Subtype_Declaration => 685, - Iir_Kind_Nature_Declaration => 691, - Iir_Kind_Subnature_Declaration => 698, - Iir_Kind_Package_Header => 700, - Iir_Kind_Unit_Declaration => 709, - Iir_Kind_Library_Declaration => 717, - Iir_Kind_Component_Declaration => 727, - Iir_Kind_Attribute_Declaration => 734, - Iir_Kind_Group_Template_Declaration => 740, - Iir_Kind_Group_Declaration => 747, - Iir_Kind_Element_Declaration => 755, - Iir_Kind_Nature_Element_Declaration => 762, - Iir_Kind_Non_Object_Alias_Declaration => 770, - Iir_Kind_Psl_Declaration => 778, - Iir_Kind_Psl_Endpoint_Declaration => 792, - Iir_Kind_Enumeration_Literal => 804, - Iir_Kind_Function_Declaration => 829, - Iir_Kind_Procedure_Declaration => 853, - Iir_Kind_Function_Body => 863, - Iir_Kind_Procedure_Body => 874, - Iir_Kind_Function_Instantiation_Declaration => 885, - Iir_Kind_Procedure_Instantiation_Declaration => 895, - Iir_Kind_Terminal_Declaration => 904, - Iir_Kind_Object_Alias_Declaration => 916, - Iir_Kind_Free_Quantity_Declaration => 928, - Iir_Kind_Spectrum_Quantity_Declaration => 941, - Iir_Kind_Noise_Quantity_Declaration => 953, - Iir_Kind_Across_Quantity_Declaration => 969, - Iir_Kind_Through_Quantity_Declaration => 985, - Iir_Kind_File_Declaration => 1000, - Iir_Kind_Guard_Signal_Declaration => 1014, - Iir_Kind_Signal_Declaration => 1031, - Iir_Kind_Variable_Declaration => 1044, - Iir_Kind_Constant_Declaration => 1058, - Iir_Kind_Iterator_Declaration => 1070, - Iir_Kind_Interface_Constant_Declaration => 1087, - Iir_Kind_Interface_Variable_Declaration => 1103, - Iir_Kind_Interface_Signal_Declaration => 1124, - Iir_Kind_Interface_File_Declaration => 1140, - Iir_Kind_Interface_Quantity_Declaration => 1156, - Iir_Kind_Interface_Terminal_Declaration => 1168, - Iir_Kind_Interface_Type_Declaration => 1179, - Iir_Kind_Interface_Package_Declaration => 1192, - Iir_Kind_Interface_Function_Declaration => 1210, - Iir_Kind_Interface_Procedure_Declaration => 1224, - Iir_Kind_Signal_Attribute_Declaration => 1227, - Iir_Kind_Identity_Operator => 1231, - Iir_Kind_Negation_Operator => 1235, - Iir_Kind_Absolute_Operator => 1239, - Iir_Kind_Not_Operator => 1243, - Iir_Kind_Implicit_Condition_Operator => 1247, - Iir_Kind_Condition_Operator => 1251, - Iir_Kind_Reduction_And_Operator => 1255, - Iir_Kind_Reduction_Or_Operator => 1259, - Iir_Kind_Reduction_Nand_Operator => 1263, - Iir_Kind_Reduction_Nor_Operator => 1267, - Iir_Kind_Reduction_Xor_Operator => 1271, - Iir_Kind_Reduction_Xnor_Operator => 1275, - Iir_Kind_And_Operator => 1280, - Iir_Kind_Or_Operator => 1285, - Iir_Kind_Nand_Operator => 1290, - Iir_Kind_Nor_Operator => 1295, - Iir_Kind_Xor_Operator => 1300, - Iir_Kind_Xnor_Operator => 1305, - Iir_Kind_Equality_Operator => 1310, - Iir_Kind_Inequality_Operator => 1315, - Iir_Kind_Less_Than_Operator => 1320, - Iir_Kind_Less_Than_Or_Equal_Operator => 1325, - Iir_Kind_Greater_Than_Operator => 1330, - Iir_Kind_Greater_Than_Or_Equal_Operator => 1335, - Iir_Kind_Match_Equality_Operator => 1340, - Iir_Kind_Match_Inequality_Operator => 1345, - Iir_Kind_Match_Less_Than_Operator => 1350, - Iir_Kind_Match_Less_Than_Or_Equal_Operator => 1355, - Iir_Kind_Match_Greater_Than_Operator => 1360, - Iir_Kind_Match_Greater_Than_Or_Equal_Operator => 1365, - Iir_Kind_Sll_Operator => 1370, - Iir_Kind_Sla_Operator => 1375, - Iir_Kind_Srl_Operator => 1380, - Iir_Kind_Sra_Operator => 1385, - Iir_Kind_Rol_Operator => 1390, - Iir_Kind_Ror_Operator => 1395, - Iir_Kind_Addition_Operator => 1400, - Iir_Kind_Substraction_Operator => 1405, - Iir_Kind_Concatenation_Operator => 1410, - Iir_Kind_Multiplication_Operator => 1415, - Iir_Kind_Division_Operator => 1420, - Iir_Kind_Modulus_Operator => 1425, - Iir_Kind_Remainder_Operator => 1430, - Iir_Kind_Exponentiation_Operator => 1435, - Iir_Kind_Function_Call => 1443, - Iir_Kind_Aggregate => 1450, - Iir_Kind_Parenthesis_Expression => 1453, - Iir_Kind_Qualified_Expression => 1457, - Iir_Kind_Type_Conversion => 1462, - Iir_Kind_Allocator_By_Expression => 1467, - Iir_Kind_Allocator_By_Subtype => 1473, - Iir_Kind_Selected_Element => 1481, - Iir_Kind_Dereference => 1486, - Iir_Kind_Implicit_Dereference => 1491, - Iir_Kind_Slice_Name => 1498, - Iir_Kind_Indexed_Name => 1504, - Iir_Kind_Psl_Prev => 1510, - Iir_Kind_Psl_Stable => 1515, - Iir_Kind_Psl_Rose => 1520, - Iir_Kind_Psl_Fell => 1525, - Iir_Kind_Psl_Onehot => 1528, - Iir_Kind_Psl_Onehot0 => 1531, - Iir_Kind_Psl_Expression => 1533, - Iir_Kind_Sensitized_Process_Statement => 1554, - Iir_Kind_Process_Statement => 1574, - Iir_Kind_Concurrent_Simple_Signal_Assignment => 1587, - Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1600, - Iir_Kind_Concurrent_Selected_Signal_Assignment => 1614, - Iir_Kind_Concurrent_Assertion_Statement => 1622, - Iir_Kind_Concurrent_Procedure_Call_Statement => 1629, - Iir_Kind_Concurrent_Break_Statement => 1637, - Iir_Kind_Psl_Assert_Directive => 1651, - Iir_Kind_Psl_Assume_Directive => 1663, - Iir_Kind_Psl_Cover_Directive => 1675, - Iir_Kind_Psl_Restrict_Directive => 1686, - Iir_Kind_Block_Statement => 1700, - Iir_Kind_If_Generate_Statement => 1711, - Iir_Kind_Case_Generate_Statement => 1720, - Iir_Kind_For_Generate_Statement => 1729, - Iir_Kind_Component_Instantiation_Statement => 1740, - Iir_Kind_Psl_Default_Clock => 1743, - Iir_Kind_Generate_Statement_Body => 1754, - Iir_Kind_If_Generate_Else_Clause => 1760, - Iir_Kind_Simple_Simultaneous_Statement => 1767, - Iir_Kind_Simultaneous_Null_Statement => 1771, - Iir_Kind_Simultaneous_Procedural_Statement => 1782, - Iir_Kind_Simultaneous_Case_Statement => 1791, - Iir_Kind_Simultaneous_If_Statement => 1800, - Iir_Kind_Simultaneous_Elsif => 1806, - Iir_Kind_Simple_Signal_Assignment_Statement => 1817, - Iir_Kind_Conditional_Signal_Assignment_Statement => 1828, - Iir_Kind_Selected_Waveform_Assignment_Statement => 1840, - Iir_Kind_Signal_Force_Assignment_Statement => 1850, - Iir_Kind_Signal_Release_Assignment_Statement => 1859, - Iir_Kind_Null_Statement => 1863, - Iir_Kind_Assertion_Statement => 1870, - Iir_Kind_Report_Statement => 1876, - Iir_Kind_Wait_Statement => 1884, - Iir_Kind_Variable_Assignment_Statement => 1891, - Iir_Kind_Conditional_Variable_Assignment_Statement => 1898, - Iir_Kind_Return_Statement => 1904, - Iir_Kind_For_Loop_Statement => 1915, - Iir_Kind_While_Loop_Statement => 1926, - Iir_Kind_Next_Statement => 1933, - Iir_Kind_Exit_Statement => 1940, - Iir_Kind_Case_Statement => 1949, - Iir_Kind_Procedure_Call_Statement => 1955, - Iir_Kind_Break_Statement => 1962, - Iir_Kind_If_Statement => 1972, - Iir_Kind_Elsif => 1978, - Iir_Kind_Character_Literal => 1985, - Iir_Kind_Simple_Name => 1992, - Iir_Kind_Selected_Name => 2000, - Iir_Kind_Operator_Symbol => 2005, - Iir_Kind_Reference_Name => 2010, - Iir_Kind_External_Constant_Name => 2019, - Iir_Kind_External_Signal_Name => 2028, - Iir_Kind_External_Variable_Name => 2038, - Iir_Kind_Selected_By_All_Name => 2044, - Iir_Kind_Parenthesis_Name => 2049, - Iir_Kind_Package_Pathname => 2053, - Iir_Kind_Absolute_Pathname => 2054, - Iir_Kind_Relative_Pathname => 2055, - Iir_Kind_Pathname_Element => 2060, - Iir_Kind_Base_Attribute => 2062, - Iir_Kind_Subtype_Attribute => 2067, - Iir_Kind_Element_Attribute => 2072, - Iir_Kind_Across_Attribute => 2077, - Iir_Kind_Through_Attribute => 2082, - Iir_Kind_Nature_Reference_Attribute => 2086, - Iir_Kind_Left_Type_Attribute => 2091, - Iir_Kind_Right_Type_Attribute => 2096, - Iir_Kind_High_Type_Attribute => 2101, - Iir_Kind_Low_Type_Attribute => 2106, - Iir_Kind_Ascending_Type_Attribute => 2111, - Iir_Kind_Image_Attribute => 2117, - Iir_Kind_Value_Attribute => 2123, - Iir_Kind_Pos_Attribute => 2129, - Iir_Kind_Val_Attribute => 2135, - Iir_Kind_Succ_Attribute => 2141, - Iir_Kind_Pred_Attribute => 2147, - Iir_Kind_Leftof_Attribute => 2153, - Iir_Kind_Rightof_Attribute => 2159, - Iir_Kind_Signal_Slew_Attribute => 2167, - Iir_Kind_Quantity_Slew_Attribute => 2175, - Iir_Kind_Ramp_Attribute => 2183, - Iir_Kind_Zoh_Attribute => 2191, - Iir_Kind_Ltf_Attribute => 2199, - Iir_Kind_Ztf_Attribute => 2209, - Iir_Kind_Dot_Attribute => 2216, - Iir_Kind_Integ_Attribute => 2223, - Iir_Kind_Above_Attribute => 2231, - Iir_Kind_Quantity_Delayed_Attribute => 2239, - Iir_Kind_Delayed_Attribute => 2248, - Iir_Kind_Stable_Attribute => 2257, - Iir_Kind_Quiet_Attribute => 2266, - Iir_Kind_Transaction_Attribute => 2275, - Iir_Kind_Event_Attribute => 2279, - Iir_Kind_Active_Attribute => 2283, - Iir_Kind_Last_Event_Attribute => 2287, - Iir_Kind_Last_Active_Attribute => 2291, - Iir_Kind_Last_Value_Attribute => 2295, - Iir_Kind_Driving_Attribute => 2299, - Iir_Kind_Driving_Value_Attribute => 2303, - Iir_Kind_Behavior_Attribute => 2303, - Iir_Kind_Structure_Attribute => 2303, - Iir_Kind_Simple_Name_Attribute => 2310, - Iir_Kind_Instance_Name_Attribute => 2315, - Iir_Kind_Path_Name_Attribute => 2320, - Iir_Kind_Left_Array_Attribute => 2327, - Iir_Kind_Right_Array_Attribute => 2334, - Iir_Kind_High_Array_Attribute => 2341, - Iir_Kind_Low_Array_Attribute => 2348, - Iir_Kind_Length_Array_Attribute => 2355, - Iir_Kind_Ascending_Array_Attribute => 2362, - Iir_Kind_Range_Array_Attribute => 2369, - Iir_Kind_Reverse_Range_Array_Attribute => 2376, - Iir_Kind_Attribute_Name => 2385 + Iir_Kind_Library_Clause => 38, + Iir_Kind_Use_Clause => 42, + Iir_Kind_Context_Reference => 46, + Iir_Kind_PSL_Inherit_Spec => 50, + Iir_Kind_Integer_Literal => 55, + Iir_Kind_Floating_Point_Literal => 60, + Iir_Kind_Null_Literal => 62, + Iir_Kind_String_Literal8 => 73, + Iir_Kind_Physical_Int_Literal => 79, + Iir_Kind_Physical_Fp_Literal => 85, + Iir_Kind_Simple_Aggregate => 90, + Iir_Kind_Overflow_Literal => 93, + Iir_Kind_Unaffected_Waveform => 94, + Iir_Kind_Waveform_Element => 97, + Iir_Kind_Conditional_Waveform => 101, + Iir_Kind_Conditional_Expression => 105, + Iir_Kind_Association_Element_By_Expression => 113, + Iir_Kind_Association_Element_By_Name => 121, + Iir_Kind_Association_Element_By_Individual => 130, + Iir_Kind_Association_Element_Open => 136, + Iir_Kind_Association_Element_Package => 142, + Iir_Kind_Association_Element_Type => 150, + Iir_Kind_Association_Element_Subprogram => 156, + Iir_Kind_Association_Element_Terminal => 162, + Iir_Kind_Choice_By_Range => 170, + Iir_Kind_Choice_By_Expression => 178, + Iir_Kind_Choice_By_Others => 184, + Iir_Kind_Choice_By_None => 190, + Iir_Kind_Choice_By_Name => 197, + Iir_Kind_Entity_Aspect_Entity => 199, + Iir_Kind_Entity_Aspect_Configuration => 200, + Iir_Kind_Entity_Aspect_Open => 200, + Iir_Kind_Psl_Hierarchical_Name => 202, + Iir_Kind_Block_Configuration => 208, + Iir_Kind_Block_Header => 212, + Iir_Kind_Component_Configuration => 219, + Iir_Kind_Binding_Indication => 223, + Iir_Kind_Entity_Class => 225, + Iir_Kind_Attribute_Value => 233, + Iir_Kind_Signature => 236, + Iir_Kind_Aggregate_Info => 243, + Iir_Kind_Procedure_Call => 247, + Iir_Kind_Record_Element_Constraint => 255, + Iir_Kind_Array_Element_Resolution => 257, + Iir_Kind_Record_Resolution => 258, + Iir_Kind_Record_Element_Resolution => 261, + Iir_Kind_Break_Element => 265, + Iir_Kind_Attribute_Specification => 274, + Iir_Kind_Disconnection_Specification => 280, + Iir_Kind_Step_Limit_Specification => 286, + Iir_Kind_Configuration_Specification => 292, + Iir_Kind_Access_Type_Definition => 299, + Iir_Kind_Incomplete_Type_Definition => 306, + Iir_Kind_Interface_Type_Definition => 312, + Iir_Kind_File_Type_Definition => 318, + Iir_Kind_Protected_Type_Declaration => 327, + Iir_Kind_Record_Type_Definition => 337, + Iir_Kind_Array_Type_Definition => 348, + Iir_Kind_Array_Subtype_Definition => 365, + Iir_Kind_Record_Subtype_Definition => 378, + Iir_Kind_Access_Subtype_Definition => 386, + Iir_Kind_Physical_Subtype_Definition => 396, + Iir_Kind_Floating_Subtype_Definition => 407, + Iir_Kind_Integer_Subtype_Definition => 417, + Iir_Kind_Enumeration_Subtype_Definition => 427, + Iir_Kind_Enumeration_Type_Definition => 438, + Iir_Kind_Integer_Type_Definition => 446, + Iir_Kind_Floating_Type_Definition => 454, + Iir_Kind_Physical_Type_Definition => 465, + Iir_Kind_Range_Expression => 473, + Iir_Kind_Protected_Type_Body => 481, + Iir_Kind_Wildcard_Type_Definition => 485, + Iir_Kind_Foreign_Vector_Type_Definition => 486, + Iir_Kind_Subtype_Definition => 493, + Iir_Kind_Scalar_Nature_Definition => 501, + Iir_Kind_Record_Nature_Definition => 514, + Iir_Kind_Array_Nature_Definition => 528, + Iir_Kind_Array_Subnature_Definition => 543, + Iir_Kind_Overload_List => 544, + Iir_Kind_Foreign_Module => 549, + Iir_Kind_Entity_Declaration => 562, + Iir_Kind_Configuration_Declaration => 572, + Iir_Kind_Context_Declaration => 578, + Iir_Kind_Package_Declaration => 593, + Iir_Kind_Package_Instantiation_Declaration => 607, + Iir_Kind_Vmode_Declaration => 618, + Iir_Kind_Vprop_Declaration => 629, + Iir_Kind_Vunit_Declaration => 641, + Iir_Kind_Package_Body => 649, + Iir_Kind_Architecture_Body => 662, + Iir_Kind_Type_Declaration => 669, + Iir_Kind_Anonymous_Type_Declaration => 675, + Iir_Kind_Subtype_Declaration => 683, + Iir_Kind_Nature_Declaration => 689, + Iir_Kind_Subnature_Declaration => 696, + Iir_Kind_Package_Header => 698, + Iir_Kind_Unit_Declaration => 707, + Iir_Kind_Library_Declaration => 715, + Iir_Kind_Component_Declaration => 725, + Iir_Kind_Attribute_Declaration => 732, + Iir_Kind_Group_Template_Declaration => 738, + Iir_Kind_Group_Declaration => 745, + Iir_Kind_Element_Declaration => 753, + Iir_Kind_Nature_Element_Declaration => 760, + Iir_Kind_Non_Object_Alias_Declaration => 768, + Iir_Kind_Psl_Declaration => 776, + Iir_Kind_Psl_Endpoint_Declaration => 790, + Iir_Kind_Enumeration_Literal => 802, + Iir_Kind_Function_Declaration => 827, + Iir_Kind_Procedure_Declaration => 851, + Iir_Kind_Function_Body => 861, + Iir_Kind_Procedure_Body => 872, + Iir_Kind_Function_Instantiation_Declaration => 883, + Iir_Kind_Procedure_Instantiation_Declaration => 893, + Iir_Kind_Terminal_Declaration => 902, + Iir_Kind_Object_Alias_Declaration => 914, + Iir_Kind_Free_Quantity_Declaration => 926, + Iir_Kind_Spectrum_Quantity_Declaration => 939, + Iir_Kind_Noise_Quantity_Declaration => 951, + Iir_Kind_Across_Quantity_Declaration => 967, + Iir_Kind_Through_Quantity_Declaration => 983, + Iir_Kind_File_Declaration => 998, + Iir_Kind_Guard_Signal_Declaration => 1012, + Iir_Kind_Signal_Declaration => 1029, + Iir_Kind_Variable_Declaration => 1042, + Iir_Kind_Constant_Declaration => 1056, + Iir_Kind_Iterator_Declaration => 1068, + Iir_Kind_Interface_Constant_Declaration => 1085, + Iir_Kind_Interface_Variable_Declaration => 1101, + Iir_Kind_Interface_Signal_Declaration => 1122, + Iir_Kind_Interface_File_Declaration => 1138, + Iir_Kind_Interface_Quantity_Declaration => 1154, + Iir_Kind_Interface_Terminal_Declaration => 1166, + Iir_Kind_Interface_Type_Declaration => 1177, + Iir_Kind_Interface_Package_Declaration => 1190, + Iir_Kind_Interface_Function_Declaration => 1208, + Iir_Kind_Interface_Procedure_Declaration => 1222, + Iir_Kind_Signal_Attribute_Declaration => 1225, + Iir_Kind_Identity_Operator => 1229, + Iir_Kind_Negation_Operator => 1233, + Iir_Kind_Absolute_Operator => 1237, + Iir_Kind_Not_Operator => 1241, + Iir_Kind_Implicit_Condition_Operator => 1245, + Iir_Kind_Condition_Operator => 1249, + Iir_Kind_Reduction_And_Operator => 1253, + Iir_Kind_Reduction_Or_Operator => 1257, + Iir_Kind_Reduction_Nand_Operator => 1261, + Iir_Kind_Reduction_Nor_Operator => 1265, + Iir_Kind_Reduction_Xor_Operator => 1269, + Iir_Kind_Reduction_Xnor_Operator => 1273, + Iir_Kind_And_Operator => 1278, + Iir_Kind_Or_Operator => 1283, + Iir_Kind_Nand_Operator => 1288, + Iir_Kind_Nor_Operator => 1293, + Iir_Kind_Xor_Operator => 1298, + Iir_Kind_Xnor_Operator => 1303, + Iir_Kind_Equality_Operator => 1308, + Iir_Kind_Inequality_Operator => 1313, + Iir_Kind_Less_Than_Operator => 1318, + Iir_Kind_Less_Than_Or_Equal_Operator => 1323, + Iir_Kind_Greater_Than_Operator => 1328, + Iir_Kind_Greater_Than_Or_Equal_Operator => 1333, + Iir_Kind_Match_Equality_Operator => 1338, + Iir_Kind_Match_Inequality_Operator => 1343, + Iir_Kind_Match_Less_Than_Operator => 1348, + Iir_Kind_Match_Less_Than_Or_Equal_Operator => 1353, + Iir_Kind_Match_Greater_Than_Operator => 1358, + Iir_Kind_Match_Greater_Than_Or_Equal_Operator => 1363, + Iir_Kind_Sll_Operator => 1368, + Iir_Kind_Sla_Operator => 1373, + Iir_Kind_Srl_Operator => 1378, + Iir_Kind_Sra_Operator => 1383, + Iir_Kind_Rol_Operator => 1388, + Iir_Kind_Ror_Operator => 1393, + Iir_Kind_Addition_Operator => 1398, + Iir_Kind_Substraction_Operator => 1403, + Iir_Kind_Concatenation_Operator => 1408, + Iir_Kind_Multiplication_Operator => 1413, + Iir_Kind_Division_Operator => 1418, + Iir_Kind_Modulus_Operator => 1423, + Iir_Kind_Remainder_Operator => 1428, + Iir_Kind_Exponentiation_Operator => 1433, + Iir_Kind_Function_Call => 1441, + Iir_Kind_Aggregate => 1448, + Iir_Kind_Parenthesis_Expression => 1451, + Iir_Kind_Qualified_Expression => 1455, + Iir_Kind_Type_Conversion => 1460, + Iir_Kind_Allocator_By_Expression => 1465, + Iir_Kind_Allocator_By_Subtype => 1471, + Iir_Kind_Selected_Element => 1479, + Iir_Kind_Dereference => 1484, + Iir_Kind_Implicit_Dereference => 1489, + Iir_Kind_Slice_Name => 1496, + Iir_Kind_Indexed_Name => 1502, + Iir_Kind_Psl_Prev => 1508, + Iir_Kind_Psl_Stable => 1513, + Iir_Kind_Psl_Rose => 1518, + Iir_Kind_Psl_Fell => 1523, + Iir_Kind_Psl_Onehot => 1526, + Iir_Kind_Psl_Onehot0 => 1529, + Iir_Kind_Psl_Expression => 1531, + Iir_Kind_Sensitized_Process_Statement => 1552, + Iir_Kind_Process_Statement => 1572, + Iir_Kind_Concurrent_Simple_Signal_Assignment => 1585, + Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1598, + Iir_Kind_Concurrent_Selected_Signal_Assignment => 1612, + Iir_Kind_Concurrent_Assertion_Statement => 1620, + Iir_Kind_Concurrent_Procedure_Call_Statement => 1627, + Iir_Kind_Concurrent_Break_Statement => 1635, + Iir_Kind_Psl_Assert_Directive => 1649, + Iir_Kind_Psl_Assume_Directive => 1661, + Iir_Kind_Psl_Cover_Directive => 1673, + Iir_Kind_Psl_Restrict_Directive => 1684, + Iir_Kind_Block_Statement => 1698, + Iir_Kind_If_Generate_Statement => 1709, + Iir_Kind_Case_Generate_Statement => 1718, + Iir_Kind_For_Generate_Statement => 1727, + Iir_Kind_Component_Instantiation_Statement => 1738, + Iir_Kind_Psl_Default_Clock => 1741, + Iir_Kind_Generate_Statement_Body => 1752, + Iir_Kind_If_Generate_Else_Clause => 1758, + Iir_Kind_Simple_Simultaneous_Statement => 1765, + Iir_Kind_Simultaneous_Null_Statement => 1769, + Iir_Kind_Simultaneous_Procedural_Statement => 1780, + Iir_Kind_Simultaneous_Case_Statement => 1789, + Iir_Kind_Simultaneous_If_Statement => 1798, + Iir_Kind_Simultaneous_Elsif => 1804, + Iir_Kind_Simple_Signal_Assignment_Statement => 1815, + Iir_Kind_Conditional_Signal_Assignment_Statement => 1826, + Iir_Kind_Selected_Waveform_Assignment_Statement => 1838, + Iir_Kind_Signal_Force_Assignment_Statement => 1848, + Iir_Kind_Signal_Release_Assignment_Statement => 1857, + Iir_Kind_Null_Statement => 1861, + Iir_Kind_Assertion_Statement => 1868, + Iir_Kind_Report_Statement => 1874, + Iir_Kind_Wait_Statement => 1882, + Iir_Kind_Variable_Assignment_Statement => 1889, + Iir_Kind_Conditional_Variable_Assignment_Statement => 1896, + Iir_Kind_Return_Statement => 1902, + Iir_Kind_For_Loop_Statement => 1913, + Iir_Kind_While_Loop_Statement => 1924, + Iir_Kind_Next_Statement => 1931, + Iir_Kind_Exit_Statement => 1938, + Iir_Kind_Case_Statement => 1947, + Iir_Kind_Procedure_Call_Statement => 1953, + Iir_Kind_Break_Statement => 1960, + Iir_Kind_If_Statement => 1970, + Iir_Kind_Elsif => 1976, + Iir_Kind_Character_Literal => 1983, + Iir_Kind_Simple_Name => 1990, + Iir_Kind_Selected_Name => 1998, + Iir_Kind_Operator_Symbol => 2003, + Iir_Kind_Reference_Name => 2008, + Iir_Kind_External_Constant_Name => 2017, + Iir_Kind_External_Signal_Name => 2026, + Iir_Kind_External_Variable_Name => 2036, + Iir_Kind_Selected_By_All_Name => 2042, + Iir_Kind_Parenthesis_Name => 2047, + Iir_Kind_Package_Pathname => 2051, + Iir_Kind_Absolute_Pathname => 2052, + Iir_Kind_Relative_Pathname => 2053, + Iir_Kind_Pathname_Element => 2058, + Iir_Kind_Base_Attribute => 2060, + Iir_Kind_Subtype_Attribute => 2065, + Iir_Kind_Element_Attribute => 2070, + Iir_Kind_Across_Attribute => 2075, + Iir_Kind_Through_Attribute => 2080, + Iir_Kind_Nature_Reference_Attribute => 2084, + Iir_Kind_Left_Type_Attribute => 2089, + Iir_Kind_Right_Type_Attribute => 2094, + Iir_Kind_High_Type_Attribute => 2099, + Iir_Kind_Low_Type_Attribute => 2104, + Iir_Kind_Ascending_Type_Attribute => 2109, + Iir_Kind_Image_Attribute => 2115, + Iir_Kind_Value_Attribute => 2121, + Iir_Kind_Pos_Attribute => 2127, + Iir_Kind_Val_Attribute => 2133, + Iir_Kind_Succ_Attribute => 2139, + Iir_Kind_Pred_Attribute => 2145, + Iir_Kind_Leftof_Attribute => 2151, + Iir_Kind_Rightof_Attribute => 2157, + Iir_Kind_Signal_Slew_Attribute => 2165, + Iir_Kind_Quantity_Slew_Attribute => 2173, + Iir_Kind_Ramp_Attribute => 2181, + Iir_Kind_Zoh_Attribute => 2189, + Iir_Kind_Ltf_Attribute => 2197, + Iir_Kind_Ztf_Attribute => 2207, + Iir_Kind_Dot_Attribute => 2214, + Iir_Kind_Integ_Attribute => 2221, + Iir_Kind_Above_Attribute => 2229, + Iir_Kind_Quantity_Delayed_Attribute => 2237, + Iir_Kind_Delayed_Attribute => 2246, + Iir_Kind_Stable_Attribute => 2255, + Iir_Kind_Quiet_Attribute => 2264, + Iir_Kind_Transaction_Attribute => 2273, + Iir_Kind_Event_Attribute => 2277, + Iir_Kind_Active_Attribute => 2281, + Iir_Kind_Last_Event_Attribute => 2285, + Iir_Kind_Last_Active_Attribute => 2289, + Iir_Kind_Last_Value_Attribute => 2293, + Iir_Kind_Driving_Attribute => 2297, + Iir_Kind_Driving_Value_Attribute => 2301, + Iir_Kind_Behavior_Attribute => 2301, + Iir_Kind_Structure_Attribute => 2301, + Iir_Kind_Simple_Name_Attribute => 2308, + Iir_Kind_Instance_Name_Attribute => 2313, + Iir_Kind_Path_Name_Attribute => 2318, + Iir_Kind_Left_Array_Attribute => 2325, + Iir_Kind_Right_Array_Attribute => 2332, + Iir_Kind_High_Array_Attribute => 2339, + Iir_Kind_Low_Array_Attribute => 2346, + Iir_Kind_Length_Array_Attribute => 2353, + Iir_Kind_Ascending_Array_Attribute => 2360, + Iir_Kind_Range_Array_Attribute => 2367, + Iir_Kind_Reverse_Range_Array_Attribute => 2374, + Iir_Kind_Attribute_Name => 2383 ); function Get_Fields_First (K : Iir_Kind) return Fields_Index is @@ -7799,13 +7801,7 @@ package body Vhdl.Nodes_Meta is function Has_Design_File (K : Iir_Kind) return Boolean is begin - case K is - when Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module => - return True; - when others => - return False; - end case; + return K = Iir_Kind_Design_Unit; end Has_Design_File; function Has_Design_File_Chain (K : Iir_Kind) return Boolean is @@ -7822,7 +7818,6 @@ package body Vhdl.Nodes_Meta is begin case K is when Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Library_Declaration => return True; when others => @@ -7853,13 +7848,7 @@ package body Vhdl.Nodes_Meta is function Has_Date_State (K : Iir_Kind) return Boolean is begin - case K is - when Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module => - return True; - when others => - return False; - end case; + return K = Iir_Kind_Design_Unit; end Has_Date_State; function Has_Guarded_Target_State (K : Iir_Kind) return Boolean is @@ -7886,13 +7875,7 @@ package body Vhdl.Nodes_Meta is function Has_Hash_Chain (K : Iir_Kind) return Boolean is begin - case K is - when Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module => - return True; - when others => - return False; - end case; + return K = Iir_Kind_Design_Unit; end Has_Hash_Chain; function Has_Design_Unit_Source_Pos (K : Iir_Kind) return Boolean is @@ -8492,7 +8475,6 @@ package body Vhdl.Nodes_Meta is case K is when Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Library_Clause | Iir_Kind_Use_Clause | Iir_Kind_Context_Reference @@ -8627,6 +8609,7 @@ package body Vhdl.Nodes_Meta is begin case K is when Iir_Kind_Block_Header + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Component_Declaration => return True; @@ -8639,6 +8622,7 @@ package body Vhdl.Nodes_Meta is begin case K is when Iir_Kind_Block_Header + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Package_Instantiation_Declaration | Iir_Kind_Package_Header @@ -9230,7 +9214,8 @@ package body Vhdl.Nodes_Meta is function Has_Design_Unit (K : Iir_Kind) return Boolean is begin case K is - when Iir_Kind_Entity_Declaration + when Iir_Kind_Foreign_Module + | Iir_Kind_Entity_Declaration | Iir_Kind_Configuration_Declaration | Iir_Kind_Context_Declaration | Iir_Kind_Package_Declaration @@ -9354,6 +9339,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Floating_Type_Definition | Iir_Kind_Physical_Type_Definition | Iir_Kind_Wildcard_Type_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kind_Subtype_Definition => return True; when others => @@ -9411,11 +9397,11 @@ package body Vhdl.Nodes_Meta is begin case K is when Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Library_Clause | Iir_Kind_Record_Element_Constraint | Iir_Kind_Record_Element_Resolution | Iir_Kind_Protected_Type_Body + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Configuration_Declaration | Iir_Kind_Context_Declaration @@ -10541,7 +10527,6 @@ package body Vhdl.Nodes_Meta is case K is when Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Library_Declaration => return True; when others => @@ -10910,7 +10895,6 @@ package body Vhdl.Nodes_Meta is case K is when Iir_Kind_Design_File | Iir_Kind_Design_Unit - | Iir_Kind_Foreign_Module | Iir_Kind_Library_Clause | Iir_Kind_Use_Clause | Iir_Kind_Context_Reference @@ -10928,6 +10912,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Step_Limit_Specification | Iir_Kind_Configuration_Specification | Iir_Kind_Protected_Type_Body + | Iir_Kind_Foreign_Module | Iir_Kind_Entity_Declaration | Iir_Kind_Configuration_Declaration | Iir_Kind_Context_Declaration diff --git a/src/vhdl/vhdl-prints.adb b/src/vhdl/vhdl-prints.adb index e14488db0..06725456c 100644 --- a/src/vhdl/vhdl-prints.adb +++ b/src/vhdl/vhdl-prints.adb @@ -4530,6 +4530,8 @@ package body Vhdl.Prints is Disp_Verification_Unit (Ctxt, Decl, Tok_Vmode); when Iir_Kind_Vprop_Declaration => Disp_Verification_Unit (Ctxt, Decl, Tok_Vprop); + when Iir_Kind_Foreign_Module => + raise Internal_Error; end case; end Disp_Design_Unit; diff --git a/src/vhdl/vhdl-sem.adb b/src/vhdl/vhdl-sem.adb index 494d0bd1f..12b13a13c 100644 --- a/src/vhdl/vhdl-sem.adb +++ b/src/vhdl/vhdl-sem.adb @@ -3497,6 +3497,8 @@ package body Vhdl.Sem is Sem_Context_Declaration (Library_Unit); when Iir_Kinds_Verification_Unit => Sem_Psl.Sem_Psl_Verification_Unit (Library_Unit); + when Iir_Kind_Foreign_Module => + raise Internal_Error; end case; end if; diff --git a/src/vhdl/vhdl-sem_assocs.adb b/src/vhdl/vhdl-sem_assocs.adb index 99f5bd168..6d953d7a2 100644 --- a/src/vhdl/vhdl-sem_assocs.adb +++ b/src/vhdl/vhdl-sem_assocs.adb @@ -540,6 +540,11 @@ package body Vhdl.Sem_Assocs is -- Avoid a crash in case of errors. return True; end if; + if Get_Kind (Src) = Iir_Kind_Foreign_Vector_Type_Definition + or else Get_Kind (Dest) = Iir_Kind_Foreign_Vector_Type_Definition + then + return True; + end if; Src_Range := Get_Range_Constraint (Src); Dst_Range := Get_Range_Constraint (Dest); diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb index f54b7a027..79aa853e3 100644 --- a/src/vhdl/vhdl-sem_expr.adb +++ b/src/vhdl/vhdl-sem_expr.adb @@ -34,6 +34,7 @@ with Vhdl.Sem_Assocs; use Vhdl.Sem_Assocs; with Vhdl.Sem_Decls; with Vhdl.Sem_Psl; with Vhdl.Xrefs; use Vhdl.Xrefs; +with Vhdl.Ieee.Std_Logic_1164; package body Vhdl.Sem_Expr is @@ -148,6 +149,29 @@ package body Vhdl.Sem_Expr is return Via_Conversion; end if; end if; + when Iir_Kind_Foreign_Vector_Type_Definition => + declare + use Vhdl.Ieee.Std_Logic_1164; + El_Type : Iir; + begin + if Right = Bit_Type_Definition + or else Right = Boolean_Type_Definition + or else Right = Bit_Vector_Type_Definition + or else Right = Std_Logic_Type + or else Right = Std_Ulogic_Type + then + return Fully_Compatible; + end if; + if Get_Kind (Right) = Iir_Kind_Array_Type_Definition then + El_Type := Get_Base_Type (Get_Element_Subtype (Right)); + if El_Type = Std_Logic_Type + or else El_Type = Std_Ulogic_Type + or else El_Type = Bit_Type_Definition + then + return Fully_Compatible; + end if; + end if; + end; when others => null; end case; @@ -5597,7 +5621,7 @@ package body Vhdl.Sem_Expr is -- with A_TYPE set to NULL_IIR and results in setting the type of -- EXPR. if A_Type /= Null_Iir - and then Are_Types_Compatible (Expr_Type, A_Type) = Not_Compatible + and then Are_Types_Compatible (A_Type, Expr_Type) = Not_Compatible then if not Is_Error (Expr_Type) then Error_Not_Match (Expr, A_Type); diff --git a/src/vhdl/vhdl-sem_lib.adb b/src/vhdl/vhdl-sem_lib.adb index aeb737272..c4e26ee70 100644 --- a/src/vhdl/vhdl-sem_lib.adb +++ b/src/vhdl/vhdl-sem_lib.adb @@ -339,6 +339,7 @@ package body Vhdl.Sem_Lib is Prev_Nbr_Errors : Natural; Warnings : Warnings_Setting; Error : Boolean; + Lib_Unit : Iir; begin if Get_Date (Design_Unit) = Date_Replacing then Error_Msg_Sem (+Loc, "circular reference of %n", +Design_Unit); @@ -374,7 +375,21 @@ package body Vhdl.Sem_Lib is Set_Date_State (Design_Unit, Date_Analyze); -- Analyze unit. - Finish_Compilation (Design_Unit); + Lib_Unit := Get_Library_Unit (Design_Unit); + if Get_Kind (Lib_Unit) /= Iir_Kind_Foreign_Module then + Finish_Compilation (Design_Unit); + else + if Convert_Foreign_Unit = null then + Error_Msg_Sem (Loc, "cannot handle %n", +Design_Unit); + Error := True; + else + -- Try to import the foreign unit. + if not Convert_Foreign_Unit (Lib_Unit) then + Error := True; + end if; + end if; + Set_Date (Design_Unit, Date_Analyzed); + end if; -- Check if one of its dependency makes this unit obsolete. -- FIXME: to do when the dependency is added ? diff --git a/src/vhdl/vhdl-sem_lib.ads b/src/vhdl/vhdl-sem_lib.ads index 9263e5796..243605b6e 100644 --- a/src/vhdl/vhdl-sem_lib.ads +++ b/src/vhdl/vhdl-sem_lib.ads @@ -59,4 +59,11 @@ package Vhdl.Sem_Lib is -- Free the dependence list of DESIGN. For libghdl. procedure Free_Dependence_List (Design : Iir_Design_Unit); + + type Convert_Foreign_Unit_Acc is access + function (Unit : Iir) return Boolean; + + -- Function to convert a foreign unit. + -- Return True in case of success. + Convert_Foreign_Unit : Convert_Foreign_Unit_Acc; end Vhdl.Sem_Lib; diff --git a/src/vhdl/vhdl-sem_names.adb b/src/vhdl/vhdl-sem_names.adb index 28bfcaab4..56096a2b0 100644 --- a/src/vhdl/vhdl-sem_names.adb +++ b/src/vhdl/vhdl-sem_names.adb @@ -2456,7 +2456,9 @@ package body Vhdl.Sem_Names is Check_Synopsys_Package (Prefix); end if; Sem.Add_Dependence (Res); - Res := Get_Library_Unit (Res); + if Get_Kind (Res) = Iir_Kind_Design_Unit then + Res := Get_Library_Unit (Res); + end if; elsif not Soft then Error_Msg_Sem (+Name, "unit %i not found in %n", (+Suffix, +Prefix)); @@ -4993,6 +4995,7 @@ package body Vhdl.Sem_Names is | Iir_Kind_Package_Instantiation_Declaration | Iir_Kind_Interface_Package_Declaration | Iir_Kind_Library_Declaration + | Iir_Kind_Foreign_Module | Iir_Kinds_Subprogram_Declaration | Iir_Kind_Component_Declaration => Res := Finish_Sem_Name (Name, Res); diff --git a/src/vhdl/vhdl-sem_specs.adb b/src/vhdl/vhdl-sem_specs.adb index 29c13b7a9..810e390cc 100644 --- a/src/vhdl/vhdl-sem_specs.adb +++ b/src/vhdl/vhdl-sem_specs.adb @@ -1256,57 +1256,71 @@ package body Vhdl.Sem_Specs is end if; end Sem_Step_Limit_Specification; + function Sem_Entity_Aspect_Entity (Aspect : Iir) return Iir + is + Entity_Name : Iir; + Entity : Iir; + Arch_Name : Iir; + Arch_Unit : Iir; + begin + -- The entity. + Entity_Name := Get_Entity_Name (Aspect); + if Is_Error (Entity_Name) then + return Null_Iir; + end if; + Entity_Name := Sem_Denoting_Name (Get_Entity_Name (Aspect)); + Set_Entity_Name (Aspect, Entity_Name); + Entity := Get_Named_Entity (Entity_Name); + if Entity = Error_Mark then + return Null_Iir; + end if; + Arch_Name := Get_Architecture (Aspect); + case Get_Kind (Entity) is + when Iir_Kind_Entity_Declaration => + -- Continue below. + null; + when Iir_Kind_Foreign_Module => + -- There is no architecture. + if Arch_Name /= Null_Iir then + Error_Msg_Sem (+Aspect, "architecture not allowed for %n", + +Entity); + end if; + return Entity; + when others => + Error_Class_Match (Entity_Name, "entity"); + return Null_Iir; + end case; + -- Note: dependency is added by Sem_Denoting_Name. + + -- Check architecture. + if Arch_Name /= Null_Iir then + Arch_Unit := Libraries.Find_Secondary_Unit + (Get_Design_Unit (Entity), Get_Identifier (Arch_Name)); + if Arch_Unit /= Null_Iir then + -- The architecture is known. + if Get_Date_State (Arch_Unit) >= Date_Parse then + -- And loaded! + Arch_Unit := Get_Library_Unit (Arch_Unit); + end if; + Set_Named_Entity (Arch_Name, Arch_Unit); + Xref_Ref (Arch_Name, Arch_Unit); + end if; + + -- FIXME: may emit a warning if the architecture does not + -- exist. + -- Note: the design needs the architecture. + Add_Dependence (Aspect); + end if; + return Entity; + end Sem_Entity_Aspect_Entity; + -- Analyze entity aspect ASPECT and return the entity declaration. -- Return NULL_IIR if not found. function Sem_Entity_Aspect (Aspect : Iir) return Iir is begin case Get_Kind (Aspect) is when Iir_Kind_Entity_Aspect_Entity => - declare - Entity_Name : Iir; - Entity : Iir; - Arch_Name : Iir; - Arch_Unit : Iir; - begin - -- The entity. - Entity_Name := Get_Entity_Name (Aspect); - if Is_Error (Entity_Name) then - return Null_Iir; - end if; - Entity_Name := Sem_Denoting_Name (Get_Entity_Name (Aspect)); - Set_Entity_Name (Aspect, Entity_Name); - Entity := Get_Named_Entity (Entity_Name); - if Entity = Error_Mark then - return Null_Iir; - end if; - if Get_Kind (Entity) /= Iir_Kind_Entity_Declaration then - Error_Class_Match (Entity_Name, "entity"); - return Null_Iir; - end if; - -- Note: dependency is added by Sem_Denoting_Name. - - -- Check architecture. - Arch_Name := Get_Architecture (Aspect); - if Arch_Name /= Null_Iir then - Arch_Unit := Libraries.Find_Secondary_Unit - (Get_Design_Unit (Entity), Get_Identifier (Arch_Name)); - if Arch_Unit /= Null_Iir then - -- The architecture is known. - if Get_Date_State (Arch_Unit) >= Date_Parse then - -- And loaded! - Arch_Unit := Get_Library_Unit (Arch_Unit); - end if; - Set_Named_Entity (Arch_Name, Arch_Unit); - Xref_Ref (Arch_Name, Arch_Unit); - end if; - - -- FIXME: may emit a warning if the architecture does not - -- exist. - -- Note: the design needs the architecture. - Add_Dependence (Aspect); - end if; - return Entity; - end; + return Sem_Entity_Aspect_Entity (Aspect); when Iir_Kind_Entity_Aspect_Configuration => declare @@ -1815,19 +1829,13 @@ package body Vhdl.Sem_Specs is null; end if; - case Iir_Kinds_Design_Unit (Get_Kind (Entity_Unit)) is - when Iir_Kind_Design_Unit => - Design_Unit := Load_Primary_Unit - (Get_Library (Get_Design_File (Entity_Unit)), - Get_Identifier (Get_Library_Unit (Entity_Unit)), - Parent); - -- Found an entity which is not in the library. - pragma Assert (Design_Unit /= Null_Iir); - Entity := Get_Library_Unit (Design_Unit); - - when Iir_Kind_Foreign_Module => - Entity := Entity_Unit; - end case; + Design_Unit := Load_Primary_Unit + (Get_Library (Get_Design_File (Entity_Unit)), + Get_Identifier (Get_Library_Unit (Entity_Unit)), + Parent); + -- Found an entity which is not in the library. + pragma Assert (Design_Unit /= Null_Iir); + Entity := Get_Library_Unit (Design_Unit); Res := Create_Iir (Iir_Kind_Binding_Indication); Location_Copy (Res, Parent); @@ -1843,10 +1851,7 @@ package body Vhdl.Sem_Specs is Set_Entity_Name (Aspect, Entity_Name); Set_Entity_Aspect (Res, Aspect); - -- No aspect for foreign modules. - if Create_Map_Aspect - and then Get_Kind (Entity) = Iir_Kind_Entity_Declaration - then + if Create_Map_Aspect then -- LRM 5.2.2 -- The default binding indication includes a default generic map -- aspect if the design entity implied by the entity aspect contains @@ -1936,7 +1941,7 @@ package body Vhdl.Sem_Specs is Assoc := Create_Iir (Iir_Kind_Association_Element_Open); Location_Copy (Assoc, Parent); else - if Are_Nodes_Compatible (Comp_El, Ent_El) = Not_Compatible then + if Are_Nodes_Compatible (Ent_El, Comp_El) = Not_Compatible then Report_Start_Group; Error_Header; Error_Msg_Sem @@ -2026,18 +2031,22 @@ package body Vhdl.Sem_Specs is -- Return the design_unit if DECL is an entity declaration or the -- design unit of an entity declaration. Otherwise return Null_Iir. -- This double check is needed as the interpretation may be both. - function Is_Entity_Declaration (Decl : Iir) return Iir is + function Is_Entity_Declaration (Decl : Iir) return Iir + is + Lib_Unit : Iir; begin - if Get_Kind (Decl) = Iir_Kind_Entity_Declaration then - return Get_Design_Unit (Decl); - elsif Get_Kind (Decl) = Iir_Kind_Design_Unit - and then - Get_Kind (Get_Library_Unit (Decl)) = Iir_Kind_Entity_Declaration - then - return Decl; + if Get_Kind (Decl) = Iir_Kind_Design_Unit then + Lib_Unit := Get_Library_Unit (Decl); else - return Null_Iir; + Lib_Unit := Decl; end if; + case Get_Kind (Lib_Unit) is + when Iir_Kind_Entity_Declaration + | Iir_Kind_Foreign_Module => + return Get_Design_Unit (Lib_Unit); + when others => + return Null_Iir; + end case; end Is_Entity_Declaration; Name : constant Name_Id := Get_Identifier (Comp); @@ -2096,9 +2105,6 @@ package body Vhdl.Sem_Specs is Decl := Libraries.Find_Primary_Unit (Target_Lib, Name); if Decl /= Null_Iir then - if Get_Kind (Decl) = Iir_Kind_Foreign_Module then - return Decl; - end if; Res := Is_Entity_Declaration (Decl); if Res /= Null_Iir then return Res; diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb index eefdff5ab..2cbc07890 100644 --- a/src/vhdl/vhdl-utils.adb +++ b/src/vhdl/vhdl-utils.adb @@ -304,7 +304,6 @@ package body Vhdl.Utils is | Iir_Kind_Context_Reference | Iir_Kind_PSL_Inherit_Spec | Iir_Kind_Library_Declaration - | Iir_Kind_Foreign_Module | Iir_Kinds_Library_Unit | Iir_Kind_Component_Declaration | Iir_Kind_Function_Declaration @@ -316,6 +315,7 @@ package body Vhdl.Utils is | Iir_Kind_Subnature_Declaration | Iir_Kinds_Type_Declaration | Iir_Kinds_Type_And_Subtype_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kinds_Nature_Definition | Iir_Kinds_Subnature_Definition | Iir_Kind_Wildcard_Type_Definition @@ -1015,6 +1015,7 @@ package body Vhdl.Utils is | Iir_Kind_Incomplete_Type_Definition | Iir_Kind_Interface_Type_Definition | Iir_Kind_Wildcard_Type_Definition + | Iir_Kind_Foreign_Vector_Type_Definition | Iir_Kind_Error => return Res; when Iir_Kind_Access_Subtype_Definition -- cgit v1.2.3